Show understanding of the basic \cdot on Neumann model for a computer system and the stored‑program concept.
Key Components of the \cdot on Neumann Architecture
Central Processing Unit (CPU)
Control Unit (CU) – generates control signals.
Arithmetic‑Logic Unit (ALU) – performs arithmetic and logical operations.
Registers – small, fast storage locations inside the CPU (e.g., accumulator, program counter).
Memory (Primary Storage)
Random‑Access Memory (RAM) – stores both data and program instructions.
Input/Output (I/O) Devices
Keyboard, mouse, display, storage peripherals, etc.
System Bus
Data bus – transfers binary data.
Address bus – carries memory addresses.
Control bus – carries control signals.
Data Path vs. Control Path
The architecture can be split into two logical pathways:
Data Path – carries the actual data and results between registers, ALU, and memory.
Control Path – carries the signals that direct the operation of the data path, generated by the control unit.
Stored‑Program Concept
In the \cdot on Neumann model the same memory holds both data and the instructions that manipulate that data. The CPU repeatedly performs the fetch‑decode‑execute cycle:
Fetch: The address in the Program Counter (PC) is placed on the address bus; the instruction at that address is read from RAM onto the data bus and into the Instruction Register (IR).
Decode: The control unit interprets the opcode in the IR and determines which operation the ALU must perform.
Execute: The ALU carries out the operation, possibly using operands fetched from registers or memory; results are written back to a register or memory location.
Update the PC to point to the next instruction (or to a branch target).
The speed of a CPU is often expressed as the clock frequency \$f\$, where the duration of one clock cycle \$T_{cycle}\$ is
\$\$
f = \frac{1}{T_{cycle}}
\$\$
Typical \cdot on Neumann Block Diagram
Suggested diagram: Block diagram showing CPU (Control Unit, ALU, Registers) connected to Memory via the System Bus, with I/O devices attached to the bus.
Component Summary
Component
Primary Function
Control Unit (CU)
Generates control signals; orchestrates fetch‑decode‑execute cycle.
Arithmetic‑Logic Unit (ALU)
Performs arithmetic (add, subtract) and logical (AND, OR, NOT) operations.
Registers
Fast, small storage for intermediate data, addresses, and control information.
Memory (RAM)
Stores program instructions and data that the CPU accesses during execution.
System Bus
Provides pathways for data, addresses, and control signals between components.
I/O Devices
Allow interaction with the external world; data is transferred via the bus.
Why the Stored‑Program Concept Matters
Flexibility – the same hardware can run different programs without rewiring.
Programmability – programs can be written, edited, and loaded into memory.
Self‑modifying code (rare) – a program can alter its own instructions, illustrating the uniform treatment of code and data.