Show understanding of the basic Von Neumann model for a computer system and the stored program concept

CPU Architecture, Stored‑Program Concept & Related Cambridge Computer Science Topics

Learning Objectives

• Explain the Von Neumann model and the stored‑program concept.
• Identify and describe all major hardware components, registers and the fetch‑decode‑execute cycle.
• Convert between number systems, perform binary arithmetic and understand common encodings (BCD, ASCII, Unicode).
• Apply Boolean algebra, logic‑gate symbols and Karnaugh‑map simplification.
• Interpret simple assembly language, addressing modes and the two‑pass assembly process.
• Manipulate individual bits using shifts and masks.
• Describe system software (OS, language translators), data types, structures and basic algorithms.
• Outline databases, networking, security, ethics and the software development life‑cycle.
• Recognise A‑Level extensions: RISC/CISC, pipelining, parallelism, virtual machines, recursion, exception handling, AI basics and encryption.

1. Information Representation

1.1 Number Systems

1.2 Signed Representations

• Sign‑magnitude: MSB = sign (0 = positive, 1 = negative).
• Two’s complement: Invert bits and add 1; most widely used in modern CPUs.

1.3 Character Encodings

• BCD (Binary‑Coded Decimal) – 4 bits per decimal digit.
• ASCII – 7‑bit code for basic Latin characters (0‑127).
• Unicode (UTF‑8/UTF‑16) – supports world‑wide character set.

1.4 Binary Arithmetic (examples)

   1011₂   (11₁₀)
+ 0110₂   (6₁₀)
--------
10001₂  (carry out = overflow for 4‑bit unsigned)

• Carry flag set if a carry out of the MSB occurs.
• Overflow flag set if the sign of the result is incorrect for two’s‑complement addition.

2. Hardware Fundamentals

2.1 Logic Gates & Boolean Algebra

Gate	Symbol	Truth Table
AND		1 only when both inputs = 1
OR		1 when any input = 1
NOT		Inverts the input
NAND		NOT(AND)
NOR		NOT(OR)
XOR		1 when inputs differ

Boolean identities (e.g., De Morgan’s laws) are used to simplify combinational circuits. Karnaugh maps provide a visual method for minimising Boolean expressions.

2.2 Basic Combinational & Sequential Circuits

• Half‑adder, full‑adder, multiplexer, decoder.
• Flip‑flops (SR, D, JK, T) – building blocks for registers and counters.

2.3 CPU‑Level Components (overview)

3. Von Neumann Model & Stored‑Program Concept

3.1 Core Idea

A single memory unit stores both program instructions and data. The CPU fetches an instruction, decodes it, executes it, then repeats. This uniform treatment of code and data enables flexibility and programmability.

3.2 Special‑Purpose Registers

3.3 Fetch‑Decode‑Execute Cycle (step‑by‑step)

1. Fetch

   • PC → MAR (address bus)
   • Memory reads word at MAR → MDR (data bus)
   • MDR → IR
   • PC ← PC + 1 (unless altered by a branch)

2. Decode

   • Control Unit examines opcode in IR.
   • Determines required ALU operation, operand sources and destination.

3. Execute

   • Operands are moved to the ALU (via registers or MDR).
   • ALU performs the operation.
   • Result stored back to a register, MDR or memory.

4. Update PC / Branch

   • If the instruction is a branch/jump, PC is replaced with the target address.
   • Otherwise the increment performed in step 1 is used.

3.4 Data Path vs. Control Path

• Data path: Buses, registers, ALU – moves actual data.
• Control path: Signals from the CU that enable/disable elements of the data path (e.g., “load ACC”, “write MDR”).

4. Processor Fundamentals

4.1 Interrupts

• Hardware interrupt – external device signals the CPU (e.g., I/O ready).
• Software interrupt – generated by an instruction (system call).
• Typical handling: save current PC & status, jump to interrupt‑service routine, restore state, resume.

4.2 Pipelining

Divides the F‑E‑C cycle into overlapping stages (IF, ID, EX, MEM, WB). Improves throughput but introduces hazards.

4.3 RISC vs. CISC

• RISC – small, fixed‑length instructions; most execute in one cycle; load/store architecture.
• CISC – many addressing modes; variable‑length instructions; some perform multiple low‑level operations.
• Examples: ARM (RISC), x86 (CISC).

4.4 Parallelism

• Superscalar – multiple pipelines in a single core.
• Multicore – two or more independent cores sharing cache and memory.
• GPU / SIMD – many simple cores for data‑parallel tasks.

4.5 Virtual Machines

• Software layer that emulates a processor (e.g., Java Virtual Machine, Python byte‑code interpreter).
• Provides platform independence; may use Just‑In‑Time (JIT) compilation to native code.

5. Assembly Language & Machine Code

5.1 Instruction Format

OPCODE   DEST, SRC   ; comment

Typical fields:

• Opcode – operation code (binary/hex).
• Operand(s) – register, immediate value, or memory address.

5.2 Common Addressing Modes

5.3 Two‑Pass Assembler (required for A‑Level)

1. Pass 1 – Scan source, build a symbol table of label → address.
2. Pass 2 – Translate each instruction to machine code, substituting label addresses.

Example program (hypothetical ISA)

;--- Pass 1 builds symbol table ---
START:   LOAD  ACC, COUNT      ; COUNT at 0x20
SUB   ACC, #1
JNZ   START            ; loop while ACC ≠ 0
HALT
;--- Pass 2 generates machine code ---
0x10:  01 00 20   ; LOAD  ACC,0x20
0x13:  02 00 01   ; SUB   ACC,#1
0x16:  03 FF FD   ; JNZ   -3 (back to 0x10)
0x19:  FF 00 00   ; HALT

6. Bit‑Manipulation Techniques

• Logical Shift Left (LSL) – R ← R << n; inserts 0s on the right.
• Logical Shift Right (LSR) – R ← R >> n; inserts 0s on the left.
• Arithmetic Shift Right (ASR) – preserves sign bit (MSB) for signed numbers.
• Rotate Left/Right (ROL/ROR) – bits shifted out are re‑inserted on the opposite side.
• Masking – R ← R AND mask to isolate bits; R ← R OR mask to set bits; R ← R XOR mask to toggle.

Worked example: Test whether bit 5 of an 8‑bit register R is 1.

AND   R, #0x20      ; mask = 0010 0000₂
TEST  R, #0x20      ; Zero flag = 0 ⇒ bit 5 = 1

7. System Software

7.1 Operating System (OS) Functions

• Process & thread management.
• Memory management (allocation, paging, virtual memory).
• I/O control and device drivers.
• File system services (create, read, write, delete).
• Security & protection (user accounts, permissions).

7.2 Language Translators

8. Data Types & Data Structures

8.1 Primitive Types

• Integer (signed/unsigned), floating‑point, character, Boolean.

8.2 Composite Types

• Array – fixed‑size, indexed collection.
• Record / Structure – heterogeneous fields (e.g., struct {int id; char name[20];}).
• String – array of characters, often null‑terminated.

8.3 Abstract Data Types (ADTs)

8.4 File Handling

• Sequential access – read/write records in order.
• Random access – seek to any record using an address/offset.
• Text vs. binary files.

9. Algorithms & Problem Solving

9.1 Pseudocode Conventions

BEGIN
READ n
sum ← 0
FOR i ← 1 TO n DO
sum ← sum + i
ENDFOR
PRINT sum
END

9.2 Flowchart Symbols (brief list)

• Oval – Start/End
• Parallelogram – Input/Output
• Rectangle – Process/Assignment
• Diamond – Decision (yes/no)
• Arrows – Flow of control

9.3 Structured Programming Constructs

• Sequence – straight‑line code.
• Selection – IF…THEN…ELSE, CASE.
• Iteration – FOR, WHILE, REPEAT‑UNTIL.
• Subroutines – procedures/functions with parameters.

9.4 Recursion (A‑Level)

Function calls itself with a reduced problem size. Base case stops recursion.

FUNCTION factorial(n)
IF n = 0 THEN
RETURN 1
ELSE
RETURN n * factorial(n‑1)
ENDIF
ENDFUNC

10. Databases

10.1 Relational Model Basics

• Table = relation; rows = records, columns = fields.
• Primary key uniquely identifies a record.
• Foreign key creates a relationship between tables.

10.2 ER Diagrams (simplified)

Entities (rectangles), relationships (diamonds), attributes (ovals). Cardinalities (1:1, 1:N, M:N) indicate how many instances participate.

10.3 Normalisation

10.4 Basic SQL

-- DDL
CREATE TABLE Student(
ID INT PRIMARY KEY,
Name VARCHAR(50),
Age INT
);
-- DML
INSERT INTO Student VALUES (1,'Alice',20);
SELECT Name, Age FROM Student WHERE Age > 18;
UPDATE Student SET Age = 21 WHERE ID = 1;
DELETE FROM Student WHERE ID = 1;

11. Communication & Networks

11.1 Types of Networks

• LAN – local area network (e.g., office, school).
• WAN – wide area network (e.g., Internet).
• Wireless (Wi‑Fi, Bluetooth) and wired (Ethernet, fiber).

11.2 OSI / TCP‑IP Model

11.3 Basic Security in Networking

• Encryption (TLS/SSL) protects data in transit.
• Authentication – passwords, certificates, two‑factor.
• Firewalls and intrusion‑detection systems.

12. Security, Privacy & Data Integrity

12.1 Cryptography Basics

• Symmetric encryption – same key for encrypt/decrypt (e.g., AES).
• Asymmetric encryption – public/private key pair (e.g., RSA, ECC).
• Hash functions – produce fixed‑size digest (e.g., SHA‑256); used for integrity checks.
• Digital signatures – combine hashing with asymmetric encryption.

12.2 Data‑Integrity Techniques

• Parity bits, checksums, CRC (Cyclic Redundancy Check).
• Version control and backup strategies.

13. Ethics, Legal & Professional Issues

• Intellectual property – copyright, licences (GPL, MIT, proprietary).
• Privacy regulations – GDPR, data‑subject rights.
• Professional codes – BCS Code of Conduct, ACM/IEEE ethics.
• Impact of AI and automation on employment and society.
• Sustainable computing – energy consumption, e‑waste.

14. Software Development Life‑Cycle (SDLC)

• Analysis – gather requirements, feasibility study.
• Design – architectural diagrams, data models, UI mock‑ups.
• Implementation – coding, use of IDEs, version control.
• Testing

  • Unit testing – individual modules.
  • Integration testing – interaction between modules.
  • System testing – full application.
  • Acceptance testing – user validation.

• Maintenance – bug fixes, updates, performance tuning.

Development Models

15. A‑Level Extensions (selected topics)

15.1 Advanced Parallelism

• Multi‑threading – shared memory, mutexes, race conditions.
• GPU programming – CUDA/OpenCL concepts.

15.2 Exception Handling

TRY
READ file
CATCH IOError
PRINT "File not found"
FINALLY
CLOSE file
ENDTRY

15.3 Advanced Networking Protocols

• HTTP/HTTPS – request/response, status codes.
• TCP – three‑way handshake, flow control, congestion control.
• UDP – connectionless, used for streaming, DNS.
• DNS – hierarchical name resolution.

15.4 Encryption Algorithms (brief overview)

• AES – symmetric block cipher, 128‑bit block, 128/192/256‑bit key.
• RSA – public‑key algorithm based on factoring large primes.
• ECC – elliptic‑curve cryptography, offers similar security with smaller keys.

15.5 Artificial Intelligence Foundations

• Search algorithms – breadth‑first, depth‑first, A*.
• Basic machine‑learning concepts – supervised learning, classification, regression.
• Ethical considerations – bias, transparency.

16. Component Summary (quick reference)

17. Why the Stored‑Program Concept Matters

• Flexibility – Same hardware can run any program that fits in memory.
• Programmability – Programs are written, edited and loaded without rewiring.
• Uniform treatment of code & data – Enables self‑modifying code, just‑in‑time compilation, and modern virtual machines.
• Foundation for modern architectures – All contemporary CPUs, from microcontrollers to supercomputers, are built on this principle.