Produce truth tables for logic circuits including half adders and full adders

Published by Patrick Mutisya · 14 days ago

Cambridge A-Level Computer Science 9618 – 15.2 Boolean Algebra and Logic Circuits

15.2 Boolean Algebra and Logic Circuits

Learning Objective

Produce accurate truth tables for common combinational circuits, in particular the half‑adder and full‑adder.

Key Concepts

  • Boolean variables and operators: \$\cdot\$ (AND), \$+\$ (OR), \$\lnot\$ (NOT), \$\oplus\$ (XOR).

  • Logic gates and their symbolic representations.

  • Combinational circuits – output depends only on current inputs.

  • Half‑adder: adds two single‑bit binary numbers.

  • Full‑adder: adds three single‑bit binary numbers (including a carry‑in).

Half‑Adder

The half‑adder combines an XOR gate for the sum and an AND gate for the carry.

\$\text{Sum}=A\oplus B\$

\$\text{Carry}=A\cdot B\$

ABSum (\$A\oplus B\$)Carry (\$A\cdot B\$)
0000
0110
1010
1101

Suggested diagram: Half‑adder circuit using one XOR gate and one AND gate.

Full‑Adder

The full‑adder adds three bits: two operand bits \$A\$, \$B\$, and a carry‑in \$C_{\text{in}}\$. It can be built from two half‑adders and an OR gate.

\$\text{Sum}=A\oplus B\oplus C_{\text{in}}\$

\$\text{Carry}{\text{out}}=(A\cdot B)+\bigl(C{\text{in}}\cdot(A\oplus B)\bigr)\$

AB\$C_{\text{in}}\$Sum (\$A\oplus B\oplus C_{\text{in}}\$)\$C_{\text{out}}\$
00000
00110
01010
01101
10010
10101
11001
11111

Suggested diagram: Full‑adder constructed from two half‑adders and an OR gate.

Step‑by‑Step Construction of the Full‑Adder Truth Table

  1. List all possible combinations of the three inputs (\$2^3 = 8\$ rows).

  2. Compute the intermediate XOR \$A\oplus B\$ for each row.

  3. Determine the final Sum by XOR‑ing the intermediate result with \$C_{\text{in}}\$.

  4. Calculate the two carry terms:

    • \$A\cdot B\$

    • \$C_{\text{in}}\cdot(A\oplus B)\$

  5. OR the two carry terms to obtain \$C_{\text{out}}\$.

Why These Truth Tables Matter

Understanding the exact output for every input combination is essential when:

  • Designing larger arithmetic units such as ripple‑carry adders.

  • Verifying circuit behaviour through simulation or hardware testing.

  • Optimising gate count and propagation delay in digital design.

Practice Questions

  1. Using only NAND gates, draw a circuit that implements the half‑adder. Verify its truth table.

  2. Extend the full‑adder to a 4‑bit ripple‑carry adder. How many individual gates are required if each half‑adder uses one XOR and one AND gate, and each full‑adder uses two XORs, two ANDs, and one OR gate?

  3. Show that the expression for \$C{\text{out}}\$ can be simplified to \$C{\text{out}} = (A\cdot B) + (B\cdot C{\text{in}}) + (A\cdot C{\text{in}})\$. Use Boolean algebra steps.