Describe the principal operations of hardware devices

3.1 Computers and Their Components

Objective

Describe the principal operations of all hardware devices, including registers, the Von Neumann model, memory hierarchy, logic‑gate fundamentals, embedded systems and monitoring‑control loops. Explain related concepts such as buffers, RAM/ROM sub‑types, peripheral ports and the role of the control unit.

1. Von Neumann Architecture & Memory Hierarchy

  • Von Neumann model: a single shared memory stores both data and program instructions; the CPU fetches instructions sequentially unless a branch occurs.
  • Memory hierarchy (from fastest/most expensive to slowest/cheapest):

    1. CPU registers (few bytes)
    2. Cache (L1, L2, L3) – SRAM, very low latency
    3. Main memory – DRAM
    4. Secondary storage – HDD, SSD, optical discs, magnetic tape

  • Each level acts as a buffer for the next, reducing average access time.

2. CPU – Core Components and Operations

2.1 Registers (key for the instruction cycle)

RegisterPurpose
Program Counter (PC)Holds address of the next instruction to fetch.
Instruction Register (IR)Stores the currently fetched instruction.
Memory Address Register (MAR)Contains the address of the memory location to be read or written.
Memory Data Register (MDR)Holds the data being transferred to or from memory.
General‑purpose registers (e.g., R0‑R7)Used for arithmetic, logical operations and temporary storage.
Status/Flag registerIndicates result of the last operation (zero, carry, overflow, sign).

2.2 Arithmetic‑Logic Unit (ALU)

  • Performs arithmetic (add, subtract, multiply, divide) and logical (AND, OR, NOT, XOR) operations on data supplied by registers.
  • Outputs result to a destination register and sets status flags.

2.3 Control Unit (CU)

  • Generates the sequence of control signals that orchestrate the fetch‑decode‑execute‑write‑back cycle.
  • Handles interrupts (hardware or software) by saving the current PC, jumping to an interrupt service routine, and restoring state on return.
  • Implements simple pipeline stages (fetch, decode, execute, memory, write‑back) in modern CPUs to increase instruction throughput.

2.4 Instruction Cycle (using Register‑Transfer Notation)

IF MAR ← PC; PC ← PC + 1; READ → MDR

ID IR ← MDR; Decode(IR)

EX ALU ← Operands; (e.g., ACC ← ACC + R1)

WB MDR → Destination; Update Flags

Some textbooks combine the last two steps into a single “Store” phase.

3. Memory Devices

  • Read – Transfer data from a memory location to the CPU (via MDR).
  • Write – Transfer data from the CPU to a memory location.
  • Refresh (DRAM only) – Periodically rewrite stored charge to prevent loss.

3.1 RAM & ROM Sub‑types

TypeVolatilityTypical UseKey Feature
SRAMVolatileCPU cacheFast, no refresh required
DRAMVolatileMain memoryHigh density, needs refresh
PROMNon‑volatileOne‑time firmwareProgrammed once with a special device
EPROMNon‑volatileOlder BIOS chipsErased with UV light, re‑programmed
EEPROMNon‑volatileConfiguration settings, flash drivesElectrically erased/written, byte‑wise

4. Logic Gates and Logic Circuits (required by 3.2)

4.1 Basic Gate Symbols & Truth Tables

GateSymbolTruth Table (A B → Y)
NOTA → ○YA=0 → Y=1
A=1 → Y=0
ANDA & ○B → ○Y00→0
01→0
10→0
11→1
ORA ∪ ○B → ○Y00→0
01→1
10→1
11→1
NAND⎯& (AND with bubble)Inverse of AND
NOR⎯∪ (OR with bubble)Inverse of OR
XORY=1 when A≠B

4.2 Combinational Example – Half‑Adder

  • Inputs: A, B
  • Sum = A XOR B
  • Carry = A AND B

Half‑adder circuit diagram

Half‑adder built from XOR and AND gates – the basic building block of an ALU.

5. Input Devices

  • Signal detection – Capture mechanical, optical or electrical events.
  • Analog‑to‑Digital conversion (A/D) – Sample and quantise the analogue signal.
  • Encoding – Convert the digitised value into a standard code (e.g., scan codes for keyboards).

DevicePrincipal OperationTypical Example
KeyboardDetect key‑press/release → generate scan codeQWERTY PC keyboard
MouseMeasure X/Y displacement (optical or mechanical) → digital motion dataOptical mouse
ScannerCapture light intensity → A/D → bitmap imageFlat‑bed scanner
MicrophoneDetect sound pressure → A/D → digital audio samplesUSB condenser microphone

6. Output Devices

  • Digital‑to‑Analog conversion (D/A) – Required for audio and many video signals.
  • Rendering / Formatting – Turn binary data into pixels, ink marks or sound waves.

DevicePrincipal OperationTypical Example
Monitor (LCD/LED)Raster‑scan pixel data; D/A for analog inputs24‑inch HD LCD monitor
PrinterConvert bitmap/vector data into ink/toner marks; uses a page bufferLaser printer
SpeakerDigital audio samples → D/A → analog voltage → sound wavesStereo desktop speaker
ProjectorProject rasterised video frames; may require D/A conversionHDMI projector

7. Storage Devices (Secondary Memory)

  • Sequential access – Fixed order reading/writing (magnetic tape).
  • Random access – Directly address any location (HDD, SSD, optical disc).
  • Erase/Write cycle (Flash) – A block must be erased before programming; limited cycles affect endurance.

TechnologyAccess TypeKey OperationTypical Use
Magnetic Hard Disk Drive (HDD)RandomRead/write heads position over the required trackDesktop & laptop storage
Solid‑State Drive (SSD – NAND flash)RandomErase block → program page; limited cyclesHigh‑speed primary storage
Magnetic TapeSequentialWind/rewind to required position; linear read/writeBackup & archival
Optical Disc (CD/DVD/Blu‑ray)Random (sector‑based)Laser reads/writes pits; write‑once or rewritableMedia distribution, archival

8. Bus, Control Unit & Buffers

  • Data bus – Carries binary data between CPU, memory and I/O.
  • Address bus – Transports the memory address of the source or destination.
  • Control bus – Carries read/write, interrupt, clock and other timing signals.
  • Buffers – Temporary storage that decouples devices with different speeds (e.g., printer buffer, video frame buffer).

8.1 Peripheral Connection Ports

  • USB – universal serial bus, hot‑plug, power delivery.
  • HDMI – uncompressed video + audio.
  • VGA – legacy analogue video.
  • Ethernet (RJ‑45) – LAN/WAN networking.
  • Audio jacks (3.5 mm) – headphones, microphones, line‑out.
  • Serial (RS‑232) / Parallel – legacy industrial or printer interfaces.

9. Embedded Systems (required by 3.1)

  • Definition: A computer system dedicated to a specific control task, often with real‑time constraints, and usually integrated into a larger device.
  • Typical components: microcontroller (CPU + on‑chip RAM/ROM), I/O ports, sensors and actuators.
  • Principal operations:

    1. Read sensor data (A/D conversion if needed).
    2. Execute a small, often looped, program stored in non‑volatile memory.
    3. Control actuators (digital output, PWM, etc.).

  • Examples: digital watches, microwave ovens, automotive engine‑control units, IoT temperature logger.

10. Monitoring and Control Systems

  • Sensor (input) – Converts a physical quantity (temperature, light, pressure) into a digital signal.
  • Processor (CPU) – Reads the sensor, runs decision‑making software, possibly using interrupts.
  • Actuator (output) – Receives a control signal and performs a physical action (motor, valve, LED).

Typical closed‑loop example: thermostat → temperature sensor → CPU decides → heating element (actuator).

11. Summary of Principal Operations

Hardware ComponentPrincipal Operations
CPUFetch, Decode, Execute (ALU), Store/Write‑back; interrupt handling; pipelining; register‑transfer control.
RegistersHold addresses, data, status flags; provide ultra‑fast workspace for the CPU.
Memory (RAM/ROM)Read, Write, Refresh (DRAM); hierarchical buffering (cache → main → secondary).
Logic Gates & CircuitsImplement Boolean functions; combine to form adders, multiplexers, ALU blocks.
Input DevicesSignal detection → A/D conversion → encoding (scan codes, MIDI, etc.).
Output DevicesD/A conversion → rendering/formatting → signalling to human‑visible or machine‑usable form.
Storage DevicesSequential or random access; erase/write cycles for flash; block‑level management.
Bus / Control UnitData, address and control signal routing; buffering to match device speeds.
Peripheral PortsPhysical & protocol interfaces (USB, HDMI, Ethernet, etc.).
Embedded SystemsRead sensors → execute dedicated program → drive actuators; often real‑time.
Monitoring & Control LoopsSensor → CPU decision → actuator → (feedback to sensor).

Block diagram showing CPU, registers, cache, main memory, storage, I/O, bus, ports and a sensor‑actuator loop.

Suggested diagram: integrated view of the Von Neumann machine, memory hierarchy, I/O pathways and a simple monitoring‑control loop.