Show understanding that a set of instructions are grouped

4.2 Assembly Language – Grouping Instructions

Learning Objective

Demonstrate an understanding of how assembly‑language instructions are organised into logical groups (segments, blocks, sub‑routines and macros), how these groups relate to machine code, and how the assembler translates the source into an executable program.

1. From Assembly Mnemonics to Machine Code

• Each mnemonic is a human‑readable name for a binary opcode defined by the processor’s instruction set.
• The assembler replaces the mnemonic and its operands with the corresponding binary pattern, producing object code (op‑codes + relocation information).
• The loader then maps the object code into the program’s virtual memory.

Mnemonic:   ADD R1, R2, R3
Opcode:     0001 01 001 010 011
            │   │   │   │   └─ R3 (destination)
            │   │   │   └──── R2 (source)
            │   │   └────── R1 (source)
            │   └────────── opcode for ADD
            └────────────── instruction format bits

Translation pipeline

1. Source code (assembly)
2. Assembler (two‑pass) – builds a symbol table and generates object code.
3. Linker/loader – combines sections, resolves addresses and places the program in memory.

2. Two‑Pass Assembler

Forward references (using a label before it is defined) require two passes.

Illustrative example

        JMP  start          ; forward reference
loop:   ADD  R1,R2,R3
start:  SUB  R4,R5,R6
        JMP  loop

Pass 1 records start at 0x0004 and loop at 0x0002. Pass 2 substitutes those addresses into the two JMP instructions.

3. Common Addressing Modes

4. Sample Instruction Set (Cambridge 9618 – Illustrative)

5. Grouping Instructions in Assembly

5.1 Segments (Assembler Directives)

• .data – defines a **data segment**; placed in a separate section of the object file (often .rodata or .bss after linking).
• .text – defines the **code segment**; all executable instructions are emitted here.
• Other useful directives:
  • .globl – makes a label visible to the linker.
  • .align – forces address alignment.
  • .word, .byte, .asciiz – define data values.

5.2 Logical Blocks

A block is a contiguous series of instructions that together perform a single algorithmic step (e.g., the body of a loop or an initialisation routine).

• Separate blocks with a blank line and a comment header.
• Indent the body of loops and conditionals to show hierarchy.

5.3 Sub‑routines / Procedures

Reusable code is placed in a labelled block and invoked with CALL. A well‑designed sub‑routine follows a **calling convention**:

1. Save any registers that the caller expects to remain unchanged (usually on the stack).
2. Pass arguments either in registers or on the stack, as defined by the convention.
3. Return the result in a designated register (e.g., R0).
4. Restore saved registers and execute RET.

5.4 Macros

Macros are expanded by the assembler before the two‑pass translation begins. They are ideal for repetitive instruction sequences.

;--- Macro definition -------------------------------------------------
#define PRINT_STR(msg)            \
    LDR R0, =msg                  ; load address of string   \
    MOV R7, #4                    ; syscall: write            \
    SWI 0                         ; invoke OS                 \
    ; (no RET – macro is in‑line)

;--- Use of the macro -------------------------------------------------
PRINT_STR hello_msg

The macro PRINT_STR is replaced by the three instructions wherever it appears, keeping the source concise while still generating ordinary machine code.

6. Instruction‑Group Summary (including typical addressing modes)

7. Quick Syllabus Map – How This Topic Fits into the Whole Cambridge Programme

Only a part of the full IGCSE/A‑Level Computer Science syllabus is covered here. The table below shows where the “grouping of instructions” topic sits relative to other required blocks.

8. Sample Exam‑Style Questions

1. Short answer – Explain the purpose of the .text and .data directives and how they affect the layout of the final executable.
2. Code tracing – Given the fragment below, list the address of each label after Pass 1 and show the machine‑code bytes generated in Pass 2.

           .text
   start:  LDM #10
           CALL sum
           HLT
   
   sum:    ADD R0,R1,R2
           RET
   

3. Design – Write a macro called SWAP(Ra,Rb) that exchanges the contents of two registers using a temporary register Rtmp. Show the expanded code for SWAP(R3,R5).

9. Summary

• Assembly instructions are grouped into segments, blocks, sub‑routines and macros to give structure, improve readability and enable reuse.
• The assembler’s two‑pass process resolves forward references and produces binary op‑codes that the loader places into the appropriate memory segments.
• Understanding addressing modes is essential for interpreting how operands are fetched and how control‑flow instructions calculate target addresses.
• These concepts form the foundation for later topics such as CPU design, operating‑system interaction, and the translation of high‑level languages into machine code.