Show understanding of virtual memory, paging and segmentation for memory management

Operating System – Purposes, Translation Software & Memory Management

1 Operating‑System (OS) Purposes

The Cambridge syllabus expects you to list and briefly explain the core functions of an OS. Use the short notes below when revising.

• Process Management – creation, scheduling, synchronisation and termination of processes/threads.
• Memory Management – allocation of RAM, virtual‑memory support, paging/segmentation, protection and swapping.
• File‑system Management – hierarchical directories, file creation/deletion, access control and space allocation.
• Device Management – device drivers abstract hardware, handle I/O requests, buffering and spooling.
• Security & Privilege Management – user authentication, access rights, isolation between processes.
• User‑Interface (UI) Abstraction – command‑line or graphical interfaces, window management, input handling.
• Resource Allocation & Accounting – tracking CPU time, memory, disk space and network bandwidth; ensuring fair sharing.

2 Translation Software

Translation software converts high‑level source code into a form the computer can execute. The table adds a concise side‑by‑side comparison of compilers and interpreters – a common exam topic.

3 Memory Management – Virtual Memory, Paging & Segmentation

3.1 Key Terminology

3.2 Virtual Memory

Virtual memory gives each process the illusion of a large, contiguous address space, independent of the real RAM size. The MMU uses a page table (or segment table) to perform the translation.

Address‑translation formula (paging)

V = p × S + d

• V – logical address
• p – page number (V ÷ S)
• d – offset within the page (V mod S)
• S – page size (e.g., 4 KB)

Physical address:

P = f × S + d

• f – frame number obtained from the page‑table entry for p

3.3 Paging

• Structure – Both virtual and physical memory are divided into equal‑size pages/frames.
• Advantages
  • Simple allocation – any free frame can hold any page.
  • No external fragmentation.
  • Supports demand paging and easy swapping.
• Disadvantages
  • Internal fragmentation when a page is not completely used.
  • Page‑table overhead – one entry per page.
• Protection bits – Typical flags: R (read), W (write), X (execute) and a “present” bit.

Example – Translating a 32‑bit address

Assume a page size of 4 KB (2¹² bytes). A logical address 0x1234ABCD is split as:

• Page number p = 0x1234A (upper 20 bits)
• Offset d = 0xBCD (lower 12 bits)

If the page table maps 0x1234A → frame 0x5F2, the physical address becomes:

P = 0x5F2 × 0x1000 + 0xBCD = 0x5F2BCD

Page‑Replacement Algorithms

3.4 Segmentation

• Structure – The address space is divided into logical segments (code, data, stack, heap) of variable length.
• Translation – A logical address is a pair (s, o) where s = segment number, o = offset.

  L = Base_s + o  provided o < Limit_s

  The segment table supplies Base_s and Limit_s. The resulting linear address L can then be paged if a hybrid scheme is used.
• Advantages
  • Matches the programmer’s view of a program.
  • Different protection per segment (e.g., read‑only code).
• Disadvantages
  • External fragmentation – free memory may be split into small holes.
  • Variable‑size allocation is more complex than paging.
• Protection bits – Segment‑table entries also carry R/W/X flags, applied to the whole segment.

Example – Segmented address translation

Assume segment 2 has Base = 0x4000 and Limit = 0x0A00. A logical address (2, 0x03F0) translates to linear address 0x4000 + 0x03F0 = 0x43F0. If the offset exceeded the limit, a protection fault would occur.

3.5 Combined Paging & Segmentation (Paged Segmentation)

Most modern OSes use a hybrid approach: each segment is further divided into pages. This gives the logical organisation of segmentation together with the allocation efficiency of paging.

• Segment table provides the base address of a segment’s page table.
• Page table maps each page within the segment to a physical frame.
• Protection can be set at both segment and page levels.

4 Comparison of Paging, Segmentation & Hybrid Scheme

5 Additional Syllabus Topics – Quick Reference

5.1 Information Representation

• Binary, BCD, ASCII (7‑bit) vs Unicode (UTF‑8/UTF‑16).
• Two’s‑complement and one’s‑complement arithmetic.
• Overflow example: Adding 0111 1111 (+127) and 0000 0001 (+1) yields 1000 0000 (‑128) – a sign‑overflow.

5.2 Communication

• LAN vs WAN, client‑server vs peer‑to‑peer.
• Topologies: star, bus, ring, mesh.
• OSI/TCP‑IP stack diagram (placeholder image).
• IP addressing, IPv4 vs IPv6, subnetting example:

  Given 192.168.10.0/24, a /26 subnet yields four subnets: 192.168.10.0‑63, 64‑127, 128‑191, 192‑255.

5.3 Hardware

• RAM types: SRAM (fast, used for cache), DRAM (cheaper, used for main memory).
• ROM families: PROM, EPROM, EEPROM, Flash.
• Buffers and their role in I/O.
• Hardware‑in‑context table (example):

  Device	Key Component	Typical Use
  Smartphone	ARM Cortex‑A78 CPU, LPDDR5 RAM	Multimedia, sensors, networking
  IoT sensor node	Microcontroller (ATmega328P), EEPROM	Temperature monitoring, low‑power data logging

5.4 Processor Fundamentals

• Von Neumann architecture – single memory for data & instructions.
• Registers (PC, IR, ACC, MAR, MDR) and their roles.
• ALU, Control Unit, buses, clock and interrupts.
• Fetch‑Execute cycle – step‑by‑step flowchart (placeholder image).
• Performance factors: clock speed, CPI, pipelining, parallelism.

5.5 System Software (Beyond the OS)

• Utility software – anti‑virus, backup, disk‑defragmenter.
• Program libraries – reusable code (e.g., math.h).
• Translators – see Section 2.
• Mini‑project idea: Write a simple “Hello World” program in an IDE, compile, and run.

5.6 Security & Data Integrity

• Differences: security (protects against threats), privacy (protects personal data), integrity (ensures data is unchanged).
• Common threats: malware, phishing, DDoS.
• Case‑study – phishing email example and how validation checks can prevent it.
• Checksum task – compute the 8‑bit sum of the byte sequence 0x12 0xA4 0xFF (answer: 0x0B).

5.7 Ethics & Ownership

• Professional code of ethics – confidentiality, competence, public interest.
• Software licences – comparison of GPL, MIT, Proprietary (decision‑tree graphic placeholder).
• AI impact vignette – ethical considerations when using AI for automated grading.

5.8 Databases

• Limitations of file‑based storage – redundancy, limited query capability.
• Relational model basics: tables, rows, columns, primary keys.
• ER‑diagram example (placeholder image) and translation to relational schema.

6 Action‑Oriented Review Checklist – How Your Lecture Notes Stack Up Against the 2026 Cambridge AS & A‑Level Computer Science Syllabus

Use this worksheet to spot gaps quickly. Tick the box if the topic is covered, then add a short note on what needs to be added or improved.

7 Summary – Key Points to Remember

• The OS performs many core functions; memory management is a central one.
• Virtual memory lets each process view a large, contiguous address space regardless of physical RAM.
• Paging uses fixed‑size pages → eliminates external fragmentation; segmentation uses variable‑size segments → matches program structure.
• Page‑replacement algorithms (FIFO, LRU, Clock) decide which page to evict when RAM is full.
• Hybrid paging‑segmentation combines the logical benefits of segmentation with the allocation efficiency of paging – the model used by most modern 64‑bit operating systems.
• Remember the supporting topics (information representation, communication, hardware, processor fundamentals, security, ethics, databases) – they are all part of the Cambridge Computer Science syllabus.