Explain the differences between Random Access Memory (RAM) and Read Only Memory (ROM)

3.1 Computers and Their Components

Objective

Explain the differences between Random‑Access Memory (RAM) and Read‑Only Memory (ROM), describe their roles in the primary memory hierarchy, and understand how they interact with the CPU, cache, registers and secondary storage during normal operation and the boot‑up sequence.

1 Definitions

• Random‑Access Memory (RAM) – a volatile primary memory that temporarily holds data and programmes that the CPU is currently using. Its contents are lost when power is removed.
• Read‑Only Memory (ROM) – a non‑volatile primary memory that stores permanent instructions (firmware) required for system start‑up and basic hardware control. The data remains after power is switched off.

2 Primary Memory Hierarchy (Cambridge Syllabus 3.1)

The hierarchy is ordered from fastest/closest to the CPU to slowest/furthest away.

1. CPU registers – tiny storage locations inside the processor; accessed in a single clock cycle.
2. CPU cache (SRAM) – small, very fast memory that holds copies of frequently used data/instructions from RAM.
3. RAM (DRAM) – main working memory for programmes and data.
4. ROM (firmware) – holds the BIOS/UEFI and other fixed system software.
5. Secondary storage – magnetic or solid‑state devices (HDD, SSD, USB) that provide large, permanent storage.

3 Key Characteristics – RAM vs ROM

4 Why Volatility Matters (AO2 – analysis)

• Because RAM loses its contents when power is removed, any unsaved work must be written to a non‑volatile device (HDD, SSD, USB) before shutdown. Failure to do so results in data loss.
• ROM’s non‑volatility guarantees that the boot programme is always present, allowing the computer to start reliably every time it is powered on.

5 Types of RAM

1. Dynamic RAM (DRAM) – each bit is stored in a tiny capacitor that must be refreshed thousands of times per second. Inexpensive and high‑density; used for the main memory of virtually all computers.
2. Static RAM (SRAM) – uses flip‑flops to store each bit, so no refreshing is required. Faster and more reliable but considerably more expensive; employed for CPU cache and small high‑speed buffers.

6 Types of ROM

1. Mask ROM – data is permanently written during chip fabrication; cannot be altered.
2. Programmable ROM (PROM) – can be programmed once after manufacture using a special programmer.
3. Erasable Programmable ROM (EPROM) – bits are erased by exposure to ultraviolet light and then re‑programmed.
4. Electrically Erasable Programmable ROM (EEPROM) – bits are erased and re‑programmed electrically; allows in‑system firmware updates.
5. Flash memory – a type of EEPROM that can be erased and written in blocks; the technology used for modern BIOS/UEFI chips and many embedded devices.

7 Position in the Memory Hierarchy (with data flow)

From fastest to slowest, the typical hierarchy is:

• CPU registers
• CPU cache (SRAM)
• RAM (DRAM)
• ROM (firmware)
• Secondary storage (HDD/SSD/USB)

During normal operation the CPU reads/writes data mainly between registers, cache and RAM. ROM is consulted only for firmware calls. When data must be kept permanently, it is transferred from RAM to secondary storage.

8 Functional Roles During Boot‑up (aligned with syllabus wording)

1. Power‑on → CPU receives a reset signal.
2. CPU reads the boot programme (BIOS/UEFI) from ROM.
3. BIOS/UEFI performs POST (Power‑On Self‑Test) and initialises hardware.
4. It searches for a bootable device on secondary storage, locates the boot loader, and copies it into RAM.
5. Control is transferred to the boot loader; from this point the CPU executes instructions from RAM, while ROM remains available for occasional firmware calls.

9 Comparative Summary

• RAM: temporary, read/write, volatile, high capacity, very fast.
• ROM: permanent, mainly read‑only, non‑volatile, low capacity, slower than RAM but still fast.
• Both are essential: ROM starts the system; RAM provides the workspace for everything that runs after start‑up.

10 Example Scenario – Loading a Word Processor

1. The operating system, stored on the SSD, is copied into RAM during the boot sequence.
2. The word‑processor executable is read from the SSD and loaded into RAM.
3. While you type, the document resides in RAM for instant access.
4. When you click Save, the data is written back to the SSD (secondary storage).
5. The BIOS/UEFI code that initiated the whole process stays in ROM throughout.

11 Design Prompt – Protecting Data Before Power‑off (AO3)

Task: Design a simple procedure (in pseudo‑code or a flow‑chart) that ensures any critical data held in RAM is saved to secondary storage before the computer is switched off. Include:

• Detection of a power‑off or “shutdown” request.
• Verification that all open files are closed.
• Copying of modified data from RAM to a non‑volatile medium.
• Confirmation that the write operation succeeded before power is removed.

This exercise tests students’ ability to apply knowledge of volatility and the memory hierarchy to a real‑world problem.

12 Mini‑Exercise – Flow‑chart of the Boot Process (AO3)

Task: Produce a flow‑chart that shows the hand‑off from ROM to RAM during boot‑up. Include the following steps and label the memory locations:

• Power‑on reset
• Read BIOS/UEFI from ROM
• POST and hardware initialisation
• Locate boot loader on secondary storage
• Load boot loader into RAM
• Transfer control to the boot loader (CPU now executes from RAM)

Students should use standard flow‑chart symbols (oval for start/end, rectangle for processes, diamond for decisions) and clearly indicate where each operation occurs (ROM, RAM, secondary storage).

13 Quick‑Check Questions (AO1)

1. What happens to the contents of RAM when the computer is switched off? Explain why this property is useful for programme execution.
2. Why is ROM essential for the boot process? Mention at least two functions performed by the BIOS/UEFI.
3. Give two examples of non‑volatile memory that are not ROM (e.g., flash memory, magnetic hard‑disk).
4. Which type of RAM is used for CPU cache and why?
5. How does EEPROM differ from EPROM in terms of erasing and re‑programming?