Write logic expressions from circuits or truth tables

Boolean Logic – Translating Between Circuits, Truth Tables and Expressions

Cambridge IGCSE 0478 – Topic 10 (Boolean Logic)

1. What You Need to Know for the Exam

• Identify the six standard logic‑gate symbols (AND, OR, NOT, NAND, NOR, XOR).
• Recall the truth‑table for each gate (up to three inputs, one output).
• Convert a circuit diagram into a Boolean (logic) expression.
• Convert a truth table into a Boolean expression (Sum‑of‑Products or Product‑of‑Sums).
• Convert a Boolean expression into a circuit diagram, respecting the three‑input limit.
• Complete a truth table when given a circuit or an expression.
• Apply De Morgan’s laws for simplification and for converting NAND/NOR structures.

2. Quick‑Reference Box – Gate Symbols, Boolean Notation & Truth Tables

Gate	Exam Symbol (image)	Textual Symbol (exam answer)	Boolean Form	Truth Table (two inputs)
AND		· or AB	\(A\cdot B\)	A B Output 0 0 0 0 1 0 1 0 0 1 1 1
OR		+ or A+B	\(A+B\)	A B Output 0 0 0 0 1 1 1 0 1 1 1 1
NOT (Inverter)		\(\overline{A}\) or ¬A	\(\overline{A}\)	A Output 0 1 1 0
NAND		\(\overline{A\cdot B}\) or ¬(AB)	\(\overline{A\cdot B}\)	A B Output 0 0 1 0 1 1 1 0 1 1 1 0
NOR		\(\overline{A+B}\) or ¬(A+B)	\(\overline{A+B}\)	A B Output 0 0 1 0 1 0 1 0 0 1 1 0
XOR		\(\oplus\) or A⊕B	\(A\oplus B\)	A B Output 0 0 0 0 1 1 1 0 1 1 1 0

3. Three‑Input Gates (Quick Example)

Although most tables in the syllabus show two inputs, the same rules apply to three‑input versions.

• Three‑input AND (\(A\cdot B\cdot C\) or \(ABC\)):

  A	B	C	Output
  0	0	0	0
  0	0	1	0
  0	1	0	0
  0	1	1	0
  1	0	0	0
  1	0	1	0
  1	1	0	0
  1	1	1	1

• Three‑input OR (\(A+B+C\)):

  A	B	C	Output
  0	0	0	0
  0	0	1	1
  0	1	0	1
  0	1	1	1
  1	0	0	1
  1	0	1	1
  1	1	0	1
  1	1	1	1

4. From a Circuit Diagram to a Boolean Expression

Use the same systematic steps for every exam question.

1. Label every input (A, B, C …).
2. Find the output gate and work backwards toward the inputs.
3. Write the operator for each gate using the symbols from the Quick‑Reference box.
4. Insert parentheses to show the order of evaluation.
5. Replace NOT gates with an over‑line or ¬ directly before the variable or sub‑expression.

Worked Example – Circuit → Expression

Diagram (described in words):

• Inputs A and B go into an AND gate.
• The AND output and input C go into an OR gate.
• The OR gate produces the final output F.

Conversion:

1. AND gate: \(A\cdot B\)
2. OR gate: \((A\cdot B)+C\)

Result: \(\displaystyle F = (A\cdot B)+C\)

5. Completing a Truth Table from a Circuit or an Expression

Apply the gate truth tables (or the Boolean expression) row by row.

Example – Fill the Table

Expression: \(F = (A + \overline{B})\cdot C\)

6. From a Truth Table to a Boolean Expression

The syllabus requires two systematic methods.

6.1 Sum‑of‑Products (SOP)

1. Identify every row where the output is **1**.
2. For each such row write a product (AND) term:
   • Use the variable itself if the input is 1.
   • Use its complement \(\overline{X}\) if the input is 0.
3. OR all product terms together.

6.2 Product‑of‑Sums (POS)

1. Identify every row where the output is **0**.
2. For each such row write a sum (OR) term:
   • Use the variable itself if the input is 0.
   • Use its complement \(\overline{X}\) if the input is 1.
3. AND all sum terms together.

Worked Example – SOP from a Truth Table

Three variables A, B, C. Rows 2, 3 and 5 have F = 1.

Product terms:

• Row 2: \(\overline{A}\,\overline{B}\,C\)
• Row 3: \(\overline{A}\,B\,\overline{C}\)
• Row 5: \(A\,\overline{B}\,\overline{C}\)

Combine with OR:

7. De Morgan’s Laws (Essential for Simplification)

These identities are frequently tested (AO2) and are useful when converting NAND/NOR structures.

• \(\displaystyle \overline{A\cdot B}= \overline{A} + \overline{B}\)
• \(\displaystyle \overline{A + B}= \overline{A}\cdot \overline{B}\)
• Extended to three inputs:
  \(\displaystyle \overline{A\cdot B\cdot C}= \overline{A}+\overline{B}+\overline{C}\)
  \(\displaystyle \overline{A+B+C}= \overline{A}\cdot\overline{B}\cdot\overline{C}\)

8. From a Boolean Expression to a Circuit Diagram

Follow the construction order from the innermost parentheses outward.

1. Break the expression into sub‑expressions using parentheses.
2. Match each sub‑expression to the appropriate gate (AND, OR, NOT, NAND, NOR, XOR).
3. Draw the gate, label its inputs, and connect the output to the next required gate.
4. Observe the three‑input limit – split any larger product or sum into two‑ or three‑input gates.
5. Label the final output (e.g., F).

Worked Example – Build a Circuit for \(\displaystyle F = (A + \overline{B})\cdot (B + C)\)

1. \(\overline{B}\) → NOT gate.
2. \(A + \overline{B}\) → OR gate (inputs A and \(\overline{B}\)).
3. \(B + C\) → OR gate (inputs B and C).
4. Final AND gate combines the two OR‑gate outputs → F.

The resulting gate list (in order of construction):

• NOT: B → \(\overline{B}\)
• OR 1: A, \(\overline{B}\) → \(A+\overline{B}\)
• OR 2: B, C → \(B+C\)
• AND: \((A+\overline{B})\) and \((B+C)\) → F

Mini‑Exercise – Sketch the Circuit

Draw the circuit for the expression \(\displaystyle F = (A\cdot\overline{C}) + \overline{B}\).

Answer (description): 1) NOT gate on C → \(\overline{C}\). 2) AND gate with inputs A and \(\overline{C}\). 3) NOT gate on B → \(\overline{B}\). 4) OR gate combines the AND output and \(\overline{B}\) to give F. (A hand‑drawn diagram can be placed on the exam answer sheet.)

9. Exam‑Style Practice Questions

1. Circuit → Expression
   Circuit description:
   • A and B into a NAND gate.
   • The NAND output into a NOT gate.
   • The result OR‑ed with C.
   Answer: NAND gives \(\overline{A\cdot B}\); NOT inverts it to \(\overline{\overline{A\cdot B}} = A\cdot B\). Final OR with C → \(\boxed{F = (A\cdot B) + C}\).
2. Truth Table → SOP Expression
   Variables X, Y. Table:

   X	Y	F
   0	0	1
   0	1	0
   1	0	1
   1	1	0

   SOP: rows 1 and 3 give \(\overline{X}\,\overline{Y}\) + \(X\,\overline{Y}\). Simplified (optional) → \(\boxed{F = \overline{Y}}\).
3. Expression → Circuit (draw)
   \(\displaystyle F = \overline{A\cdot B} + (C\oplus D)\)
   Steps:
   • AND gate for A·B, then NOT → \(\overline{A\cdot B}\).
   • XOR gate for C⊕D.
   • OR gate combines the two results → F.
   (Students should sketch the three‑gate arrangement, respecting the three‑input rule.)

10. Summary Checklist (What to remember on the day of the exam)

• Gate symbols, Boolean notation, and two‑input truth tables – memorise the Quick‑Reference box.
• Three‑input limit – split larger expressions into several gates.
• Conversion steps:
  • Circuit → Expression (label → work backwards → write operators → parentheses).
  • Truth table → SOP / POS (list rows → write min‑terms / max‑terms → combine).
  • Expression → Circuit (break into sub‑expressions → draw matching gates → connect).
• De Morgan’s laws – useful for NAND/NOR and for simplifying expressions.
• Always check your final answer against the original diagram or table to avoid sign errors.