Write a logic expression from a problem statement, logic circuit or truth table

Boolean Logic – Cambridge IGCSE (0478) Topic 10

Learning Objective

Write a correct Boolean expression from a problem statement, a logic circuit or a truth table, and convert accurately between these three representations.


10.1 Gate‑symbol cheat‑sheet (the six symbols allowed in the exam)

Only the symbols below may appear in any IGCSE (0478) circuit diagram. No three‑input AND/OR or any other symbol is permitted.

Gate Official IGCSE symbol (drawn left‑to‑right) Textual name Symbol used in expressions
AND AND ∧ (or ·)
OR OR ∨ (or +)
NOT NOT ¬ (overline)
NAND NAND ∧ with bubble
NOR NOR ∨ with bubble
XOR XOR (exclusive OR)

10.2 Functions of each gate (with truth‑table rows)

Gate Logical description Truth‑table row (for two inputs)
AND (∧) Output 1 only when **both** inputs are 1. 0 0 → 0  0 1 → 0  1 0 → 0  1 1 → 1
OR (∨) Output 1 when **any** input is 1. 0 0 → 0  0 1 → 1  1 0 → 1  1 1 → 1
NOT (¬) Inverts the single input. 0 → 1  1 → 0
NAND Output 0 only when **both** inputs are 1 (i.e. NOT AND). 0 0 → 1  0 1 → 1  1 0 → 1  1 1 → 0
NOR Output 0 when **any** input is 1 (i.e. NOT OR). 0 0 → 1  0 1 → 0  1 0 → 0  1 1 → 0
XOR (⊕) Output 1 when **exactly one** input is 1. 0 0 → 0  0 1 → 1  1 0 → 1  1 1 → 0

10.3 Drawing rules for IGCSE circuits

  • Use **only** the six symbols listed in the cheat‑sheet.
  • Each gate may have **no more than two inputs** (three‑input AND/OR are not allowed in the core exam).
  • All inputs must be labelled (A, B, C …). Wires are straight lines; a dot indicates a junction.
  • Draw the circuit **left‑to‑right** – inputs on the left, the final output on the far‑right.
  • Do **not** simplify the circuit while drawing; it must represent the given Boolean expression exactly.
  • Place the output label (e.g. F) at the extreme right of the diagram.

Do / Don’t checklist

  • Do use a bubble on a NOT, NAND or NOR gate.
  • Do show a dot where three or more wires meet.
  • Don’t cross wires without a dot.
  • Don’t omit the bubble on a NAND/NOR – it changes the function.
  • Don’t draw three‑input gates unless the question explicitly allows it (extended work only).

From a problem statement → Boolean expression

  1. Identify every condition and assign a single‑letter variable (A, B, C …).
  2. Translate English connectors** to Boolean operators**:
    • both … and … → ∧
    • either … or … → ∨
    • either … or … (but not both) → ⊕
    • not … → ¬ (or an over‑line)
    • if … then … → ¬ condition ∨ consequence (use implication if required)
  3. Place **parentheses** to enforce the order required by the wording.

Template for the exam

1. Variables → ______
2. Operators → ∧, ∨, ¬, ⊕
3. Expression → ______ (write with parentheses)

Example 1 – Problem statement

“A user is granted access if the password is correct and the account is not locked, or the user has a security token.”

  • P = password is correct
  • L = account is locked
  • T = user has a security token

Expression (using the template):

\( (P ∧ ¬L) ∨ T \)

From a Boolean expression → logic circuit

  1. Write the expression clearly with parentheses.
  2. Start with the **innermost** parentheses; draw the corresponding gate.
  3. Connect the output of each gate to the next gate as indicated by the expression.
  4. Label every input (A, B, C …) and the final output (usually F).
  5. Check the diagram follows the left‑to‑right flow rule.

Example 2 – Expression to circuit

Expression: \((A ∧ B) ∨ C\)

  1. Draw an **AND** gate; label its inputs **A** and **B**.
  2. Draw an **OR** gate to the right of the AND gate.
  3. Connect the AND output to the left input of the OR gate; connect **C** to the right input of the OR gate.
  4. Label the OR output **F**.

Resulting circuit (official symbols):

   A ──►|\
          | AND ──►|\
   B ──►|/          | OR ──► F
                 C ──►|/

From a logic circuit → Boolean expression

  1. Read the circuit from the left‑hand inputs towards the right‑hand output.
  2. Write the sub‑expression for each gate using the symbols ∧, ∨, ¬, ⊕.
  3. Combine the sub‑expressions exactly as the wires connect, preserving parentheses.

Example 3 – Circuit to expression

Same circuit as Example 2:

   A ──►|\
          | AND ──►|\
   B ──►|/          | OR ──► F
                 C ──►|/
  • AND gate gives \(A ∧ B\).
  • OR gate combines that result with C\((A ∧ B) ∨ C\).

Thus the Boolean expression is \((A ∧ B) ∨ C\).


From a truth table → Boolean expression

Two systematic methods are required by the syllabus.

Method When to use How it works
Sum‑of‑Products (SOP) Rows where the output = 1 Write a product (AND) term for each “1” row, then OR (∨) all the terms.
Product‑of‑Sums (POS) Rows where the output = 0 Write a sum (OR) term for each “0” row, then AND (∧) all the terms.

Example 4 – SOP from a 2‑variable table

ABF
000
011
101
110

Rows with F = 1:

  • Row 2: \(\overline{A} ∧ B\)
  • Row 3: \(A ∧ \overline{B}\)

Combine with OR:

\(F = (\overline{A} ∧ B) ∨ (A ∧ \overline{B})\)

This is the XOR function.

Example 5 – POS from the same table

Rows with F = 0 are 1 and 4:

  • Row 1: \((A ∨ B)\) (because both inputs are 0, we use the un‑complemented variable in the OR term)
  • Row 4: \((\overline{A} ∨ \overline{B})\)

Combine with AND:

\(F = (A ∨ B) ∧ (\overline{A} ∨ \overline{B})\)

Full conversion example (statement ↔ expression ↔ circuit ↔ truth table)

  1. Statement: “The alarm sounds if the door is open **and** the system is armed, **or** a motion detector is triggered.”
  2. Variables:
    • D = door open
    • S = system armed
    • M = motion detector triggered
  3. Expression (using the template):
    \(F = (D ∧ S) ∨ M\)
  4. Circuit:
    • AND gate for D and S.
    • OR gate combining the AND output with M.
    • Label the final output **F**.
  5. Truth table (all 2³ combinations):
    DSM\(D ∧ S\)\(F\)
    00000
    00101
    01000
    01101
    10000
    10101
    11011
    11111

Quick revision checklist

  • Only the six official symbols may be used.
  • Remember the truth‑table row for each gate – it’s needed for SOP/POS.
  • Draw circuits left‑to‑right; output label at the far right.
  • Use the problem‑statement → variables → operators → parentheses template.
  • When converting a truth table, choose SOP for “1” rows, POS for “0” rows.
  • Check your final diagram against the “Do / Don’t” list before submitting.

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