Declaration: DIM A(10) AS INTEGER (indices 0‑9 or 1‑10 depending on language).
Access: A[i].
Common operations – initialise, traverse, search, sort (bubble, insertion).
3.4 File handling (basic)
Open a file (OPEN), read/write (READ, WRITE), close (CLOSE).
Sequential access only – required for the exam.
4 Databases & SQL (Topic 9)
4.1 Database design basics
Single‑table database – primary key uniquely identifies each record.
Choose appropriate data types (INTEGER, REAL, CHAR, VARCHAR, DATE).
Normalisation is not required for IGCSE, but avoid duplicate columns.
4.2 The five SQL commands examined
Command
Purpose
Typical syntax
SELECT
Retrieve data
SELECT column1, column2 FROM table WHERE condition;
INSERT
Add a new record
INSERT INTO table (col1, col2) VALUES (val1, val2);
UPDATE
Modify existing records
UPDATE table SET col1 = val1 WHERE condition;
DELETE
Remove records
DELETE FROM table WHERE condition;
CREATE TABLE
Define a new table
CREATE TABLE table (col1 TYPE, col2 TYPE, …);
4.3 Query‑building tips for the exam
Always write column names in the same order as they appear in the table unless SELECT * is used.
Remember that WHERE conditions use the same relational operators as in pseudocode.
Test your query mentally with a small data set to avoid logical errors.
5 Boolean Logic – Logic Gates (Topic 10)
5.1 Learning objective
Use logic gates to create logic circuits from a problem statement, a Boolean expression, or a truth table.
5.2 Key concepts
Boolean variables: 0 = FALSE, 1 = TRUE.
Primary operators (exam‑required): AND (·), OR (+), NOT (‾).
Other gates (XOR, NAND, NOR, XNOR) may appear, but you must be able to rewrite them using only AND, OR, NOT.
Truth tables – list the output for every possible combination of inputs.
Logic expressions – algebraic form of the required condition.
Simplification – Boolean algebra or Karnaugh maps to minimise the number of gates.
Implementation – converting an expression or truth table into a circuit diagram.
5.3 Standard Cambridge gate symbols
Gate
Symbol
Boolean function
AND
A·B
OR
A+B
NOT
‾A
NAND
‾(A·B)
NOR
‾(A+B)
XOR
A⊕B
XNOR
‾(A⊕B)
Truth‑table definitions for each gate
Gate
Inputs
Output
AND
A B
1 only for 1 1
OR
A B
0 only for 0 0
NOT
A
1 when A = 0, 0 when A = 1
NAND
A B
0 only for 1 1
NOR
A B
1 only for 0 0
XOR
A B
1 for 0 1 and 1 0
XNOR
A B
1 for 0 0 and 1 1
5.4 General design process
Interpret the problem. List every input variable and the exact condition that makes the output true.
Write a Boolean expression. Use AND, OR, NOT (or other gates if given) to model the condition.
Construct a truth table. Include all 2ⁿ rows for n inputs.
Simplify (optional but valuable). Apply Boolean algebra or a Karnaugh map to reduce gate count.
Draw the circuit. Replace each operator in the (simplified) expression with its gate symbol; use only AND, OR, NOT unless you explicitly show the equivalent network.
5.5 Checklist – Common pitfalls
✔️ All possible input combinations must appear in the truth table.
✔️ When an XOR, NAND, NOR, or XNOR is given, write the equivalent expression using only AND, OR, NOT before drawing the final circuit.
✔️ Verify the truth table after every simplification step – a single wrong minterm loses marks.
✔️ Keep the gate count low; a simpler circuit demonstrates AO3 analysis.
✔️ Label inputs and outputs clearly on the diagram.
5.6 Full worked example – Security system
Problem statement
Three sensors A, B and C.
The alarm L sounds if sensor A is triggered **and** exactly one of sensors B or C is triggered.
Step 1 – Identify variables
A – sensor A (1 = triggered)
B – sensor B
C – sensor C
L – alarm output
Step 2 – Write the Boolean expression
“Exactly one of B or C” is an exclusive‑OR: \(B⊕C\).
Thus
\[
L = A \cdot (B⊕C)
\]
If the exam only allows AND, OR, NOT, expand the XOR:
\[
B⊕C = (B + C)\;\cdot\;\overline{(B·C)}
\]
\[
\therefore\; L = A \cdot \big[(B + C) \cdot \overline{(B·C)}\big]
\]
Step 3 – Truth table
A
B
C
B⊕C
L = A·(B⊕C)
0
0
0
0
0
0
0
1
1
0
0
1
0
1
0
0
1
1
0
0
1
0
0
0
0
1
0
1
1
1
1
1
0
1
1
1
1
1
0
0
Step 4 – Simplify (optional)
The expanded form can be rewritten as
\[
L = A\,(B+C)\,(\overline{B}+\overline{C})
\]
which is already the minimal expression for the required function.
Step 5 – Circuit diagram
Stage 1: an XOR gate (or the equivalent OR‑AND‑NOT network) receives B and C.
Stage 2: an AND gate receives A and the XOR output.
The output of the AND gate is L.
Logic circuit for the security system (XOR + AND).
5.7 Practice problem – From a truth table
Given truth table (inputs X, Y, Z; output F):
X
Y
Z
F
0
0
0
0
0
0
1
1
0
1
0
1
0
1
1
0
1
0
0
1
1
0
1
0
1
1
0
0
1
1
1
0
Write the minimal Boolean expression using only AND, OR, NOT (show the steps – sum‑of‑products → Karnaugh map).
Draw the corresponding logic‑gate circuit.
Solution outline (teacher use):
Minterms where F = 1: m₁ (001), m₂ (010), m₄ (100).
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