Computer Systems – IGCSE 0478 (2026‑2028)
Learning objectives
By the end of this unit you should be able to:
- Explain how data are represented in binary, hexadecimal and two’s‑complement forms and convert between them.
- Describe the internal structure of a CPU, the fetch‑decode‑execute cycle and the physical implementation as a microprocessor.
- Identify the main hardware components of a computer (memory hierarchy, storage, network hardware) and their functions.
- Distinguish system software from application software and outline the basic functions of an operating system.
- Explain how data are transmitted – packet structure, packet‑switching, USB, error‑detection and correction.
- Summarise the key ideas behind the Internet, WWW, URLs, HTTP/HTTPS and cookies.
- Give a brief overview of digital currency, blockchain, cyber‑security threats and counter‑measures.
- Describe emerging technologies such as sensors, actuators, robotics and AI.
- Apply the algorithm‑design cycle, draw flowcharts, write pseudocode and use trace tables to test simple programs.
1. Data Representation
1.1 Number bases
| Base | Digits used | Common name |
|---|
| 2 | 0, 1 | Binary (bits) |
| 10 | 0‑9 | Decimal (denary) |
| 16 | 0‑9, A‑F | Hexadecimal (hex) |
1.2 Converting between bases (AO1)
Binary → Decimal
101101₂ = 1·2⁵ + 0·2⁴ + 1·2³ + 1·2² + 0·2¹ + 1·2⁰
= 32 + 0 + 8 + 4 + 0 + 1 = 45₁₀
Decimal → Binary (repeated division)
45 ÷ 2 = 22 r 1
22 ÷ 2 = 11 r 0
11 ÷ 2 = 5 r 1
5 ÷ 2 = 2 r 1
2 ÷ 2 = 1 r 0
1 ÷ 2 = 0 r 1 → read remainders bottom‑up → 101101₂
Binary ↔ Hexadecimal (group in fours)
1011 0110₂ → 1011 = B, 0110 = 6 → B6₁₆
B6₁₆ → 1011 0110₂
1.3 Two’s‑complement (negative integers)
- Write the absolute value in binary using the required number of bits.
- Invert every bit (0→1, 1→0).
- Add 1 to the inverted result.
Example (8‑bit) – –18
18₁₀ = 0001 0010₂
Invert → 1110 1101₂
Add 1 → 1110 1110₂ (this is –18₂)
Check by addition:
0001 0010₂ + 1110 1110₂ = 1 0000 0000₂ → discard the carry → 0000 0000₂ (zero)
1.4 Binary arithmetic and overflow (AO2)
Addition example (8‑bit)
0110 1101₂ (109₁₀)
+ 0101 1011₂ ( 91₁₀)
-----------------
1100 1000₂ (200₁₀) – no overflow (carry‑out = 0)
1111 1111₂ (255₁₀)
+ 0000 0001₂ ( 1₁₀)
-----------------
1 0000 0000₂ → carry‑out = 1 → overflow for unsigned addition.
For signed two’s‑complement, overflow occurs when the carry into the sign bit ≠ carry out of the sign bit.
1.5 Representing other media
- Text – ASCII (7‑bit) or Unicode (8‑bit/16‑bit). Example: ‘A’ = 0100 0001₂ = 41₁₆.
- Images – Pixels stored as binary colour values (e.g., 24‑bit RGB: 8 bits per colour). Simple black‑and‑white bitmap: 1 bit per pixel.
- Sound – Sampled amplitude values (e.g., 8‑bit PCM, 44.1 kHz). Each sample is a binary number representing pressure.
- Compression – Lossless (e.g., ZIP, PNG) retains all original bits; lossy (e.g., MP3, JPEG) discards less‑noticeable information to reduce size.
2. The Central Processing Unit (CPU) and Microprocessor
2.1 What the CPU does
The CPU is the “brain” of a computer. It repeatedly carries out the fetch‑decode‑execute cycle to process instructions stored in memory.
2.2 Fetch‑Decode‑Execute cycle
- Fetch: Program Counter (PC) provides the address of the next instruction; the instruction is read from main memory into the Instruction Register (IR).
- Decode: Control Unit (CU) interprets the opcode, identifies required registers or immediate data, and generates control signals.
- Execute: Arithmetic Logic Unit (ALU) performs the operation (add, AND, shift, etc.); result is written back to a register or memory.
2.3 Key internal components (AO2)
| Component | Function |
|---|
| Arithmetic Logic Unit (ALU) |
Performs arithmetic (add, subtract) and logical (AND, OR, NOT, shifts) operations. |
| Control Unit (CU) |
Generates timing and control signals that coordinate the fetch‑decode‑execute cycle. |
| Registers |
Fast, small storage inside the CPU (e.g., Accumulator, PC, IR, General‑purpose R0‑R7). |
| Cache memory (L1/L2) |
Very high‑speed memory on or near the CPU; stores frequently used instructions/data to reduce main‑memory accesses. |
| Bus interface unit |
Manages data transfer between the CPU and the system bus (address, data, control lines). |
2.4 Factors that affect CPU performance (AO2)
- Clock speed – MHz or GHz; number of cycles per second.
- Instruction Set Architecture (ISA) – the set of binary commands the CPU understands (e.g., x86, ARM).
- Number of cores – each core can execute its own instruction stream, enabling parallel processing.
- Pipelining – overlapping fetch, decode and execute stages for different instructions.
- Cache size & hierarchy – larger/more levels of cache reduce waiting for main memory.
- Superscalar / out‑of‑order execution – multiple instructions issued per clock cycle.
2.5 Example of a simple instruction
ADD R1, R2, R3 (R1 ← R2 + R3)
- Fetch: PC points to the instruction; it is loaded into the IR.
- Decode: CU recognises the opcode “ADD” and the operands R2, R3, R1.
- Execute: ALU adds the contents of R2 and R3; the result is written back to R1.
2.6 What is a microprocessor?
A microprocessor is a single integrated circuit (IC) that physically implements the CPU. All the components listed above (ALU, CU, registers, cache) are fabricated on one silicon chip.
2.7 Microprocessor vs. CPU – summary
| Aspect | CPU (concept) | Microprocessor (physical device) |
|---|
| Definition |
Logical unit that carries out fetch‑decode‑execute. |
Silicon chip that implements the CPU. |
| Composition |
ALU, CU, registers, cache (abstract). |
All those components integrated on one IC. |
| Form factor |
Can be built from many separate chips. |
Single package (DIP, PGA, LGA, BGA, etc.). |
| Typical use |
Describes function in any computing system. |
Found in PCs, phones, routers, microwaves, etc. |
3. Memory Hierarchy & Storage Devices
3.1 Primary memory (volatile)
- Registers – fastest, inside the CPU.
- Cache (L1, L2, L3) – SRAM, 0.5–10 ns access.
- Main memory (RAM) – DRAM, typically 10–30 ns; holds programmes and data while the computer is on.
3.2 Secondary storage (non‑volatile)
| Device | Technology | Typical capacity | Typical speed |
|---|
| Hard Disk Drive (HDD) |
Magnetic platters, moving heads |
500 GB – 4 TB |
80–200 MB/s |
| Solid‑State Drive (SSD) |
NAND flash memory |
128 GB – 2 TB |
300–3500 MB/s |
| Optical disc (CD/DVD/Blu‑ray) |
Laser‑written pits |
700 MB – 50 GB |
1–10 MB/s |
| USB flash drive |
Flash memory in a portable case |
4 GB – 1 TB |
10–500 MB/s |
3.3 Network hardware
- Network Interface Card (NIC) – provides the physical link to a network; contains a MAC address (hardware identifier).
- Router – forwards packets between different networks; uses IP addresses for logical routing.
- Switch – connects multiple devices within the same LAN; forwards frames based on MAC addresses.
- Modem – converts digital signals to analogue (and vice‑versa) for telephone or cable links.
4. Software – System vs. Application
4.1 System software
- Operating System (OS) – manages hardware resources, provides a user interface, handles files, memory, processes and security.
- Key OS functions (AO2):
- Process management (creation, scheduling, termination)
- Memory management (allocation, paging, virtual memory)
- File system control (create, read, write, delete)
- Device control via drivers
- Interrupt handling – the CPU temporarily stops its current task to service a hardware or software event.
4.2 Application software
Programs that perform specific tasks for the user, e.g. word processors, web browsers, games, spreadsheet software, database management systems.
5. Data Transmission Basics
5.1 Packet structure & packet‑switching (AO2)
A packet is a self‑contained unit of data that travels across a network.
| Part | Typical fields | Purpose |
|---|
| Header |
Source IP, Destination IP, Protocol, TTL, Checksum |
Routing information and control data. |
| Payload |
Application data (e.g., part of a web page, an email) |
Actual information being transferred. |
| Trailer |
CRC or other error‑checking code |
Detects corruption during transmission. |
Packet‑switching diagram (textual)
Computer A → Router 1 → Router 2 → … → Router N → Computer B
Each router reads the header, decides the next hop, and forwards the packet.
Different packets of the same message may take different routes.
5.2 USB (Universal Serial Bus)
- Serial communication standard for peripherals.
- Uses differential signalling (D+ / D‑) to reduce noise.
- Supports hot‑plugging and power delivery (5 V – 20 V depending on version).
- Data organised in frames (1 ms for USB 2.0) and packets within frames.
- Versions: USB 1.1 (12 Mbps), USB 2.0 (480 Mbps), USB 3.x (5–20 Gbps).
5.3 Error detection & correction (AO2)
| Method | How it works | Typical use |
|---|
| Parity bit |
Adds a single bit so the total number of 1’s is even (or odd). |
Simple serial links, early memory modules. |
| Checksum |
Sum of all data bytes (often modulo 256); the sum is sent with the data. |
IP headers, file‑transfer protocols. |
| CRC (Cyclic Redundancy Check) |
Polynomial division of the data stream; remainder appended as CRC field. |
Ethernet frames, USB, storage devices. |
| ARQ (Automatic Repeat reQuest) |
Receiver detects an error (via CRC, checksum, etc.) and requests retransmission. |
TCP, many wireless protocols. |
5.4 Basic encryption concepts (AO2)
| Type | Key usage | Speed | Typical application |
|---|
| Symmetric (e.g., AES, DES) |
Same secret key for encryption & decryption. |
Fast |
File encryption, VPN tunnels. |
| Asymmetric (e.g., RSA, ECC) |
Public key encrypts; private key decrypts. |
Slower |
Secure key exchange, digital signatures, HTTPS. |
For the IGCSE you only need to know the *purpose* of encryption – to keep data confidential and to verify authenticity – not the mathematical details.
6. The Internet & World Wide Web
6.1 Basic concepts
- Client‑server model – a client (e.g., web browser) sends a request to a server; the server returns a response.
- URL (Uniform Resource Locator) – identifies a resource on the web (e.g.,
https://www.example.com/index.html).
- HTTP / HTTPS – protocols for transferring web pages; HTTPS adds encryption via TLS/SSL.
- Cookies – small pieces of data stored by the browser to maintain state (e.g., login sessions).
6.2 Example of a simple HTTP transaction
Client: GET /index.html HTTP/1.1
Host: www.example.com
Server: HTTP/1.1 200 OK
Content-Type: text/html
Content-Length: 1024
<html> … </html>
7. Digital Currency & Blockchain (overview)
- Digital (cryptocurrency) – electronic money that uses cryptography for security (e.g., Bitcoin).
- Blockchain – a distributed, immutable ledger where each block contains a list of transactions and a hash of the previous block.
- Key ideas for the syllabus: decentralisation, public‑key cryptography for wallets, and the concept of “mining” as proof‑of‑work.
8. Cyber‑Security (basic threats & counter‑measures)
| Threat | Typical effect | Counter‑measure |
|---|
| Malware (virus, worm, Trojan) |
Unauthorised data access, system damage |
Antivirus software, regular updates, safe browsing |
| Phishing |
Steals passwords or personal data |
User education, email filters, two‑factor authentication |
| Denial‑of‑Service (DoS) |
Overloads a service, making it unavailable |
Firewalls, traffic filtering, load balancing |
| Unauthorised access |
Data theft or modification |
Strong passwords, encryption, access controls |
9. Emerging & Automated Technologies
- Sensors – convert physical quantities (temperature, light, motion) into electrical signals.
- Actuators – convert electrical signals into mechanical motion (motors, solenoids).
- Robotics – integration of sensors, actuators and control software to perform tasks.
- Artificial Intelligence (AI) – machine learning, neural networks, expert systems; increasingly embedded in smartphones and IoT devices.
- Internet of Things (IoT) – everyday objects equipped with sensors, network connectivity and microprocessors (e.g., smart thermostats).
10. Algorithms, Programming & Logic
10.1 Algorithm design cycle (AO1)
- Problem definition – understand what is required.
- Develop a step‑by‑step solution (algorithm).
- Represent the algorithm (flowchart or pseudocode).
- Implement the algorithm in a programming language.
- Test with a range of data (trace tables, boundary values).
- Evaluate – check correctness, efficiency and improve if needed.
10.2 Flowchart symbols (AO2)
| Symbol | Name | Meaning |
|---|
| ▭ | Process | Instruction or operation (e.g., “add A and B”). |
| ◇ | Decision | Yes/No question; two outgoing arrows. |
| ⭳ | Input/Output | Read or display data. |
| ⭮ | Connector | Joins separate parts of a flowchart. |
| ○ | Start/Stop | Indicates the beginning or end. |
10.3 Pseudocode conventions (AO2)
- All statements in capital letters (e.g.,
IF … THEN … ENDIF).
- Indentation shows block structure.
- Use meaningful variable names (e.g.,
total, counter).
- Common keywords:
READ, WRITE, FOR … TO … STEP … NEXT, WHILE … DO … ENDWHILE.
10.4 Trace tables (AO2)
Used to follow the values of variables as an algorithm runs.
Example – Find the sum of the first 5 natural numbers
| i | sum |
|---|-----|
| 1 | 1 |
| 2 | 3 |
| 3 | 6 |
| 4 | 10 |
| 5 | 15 |
10.5 Testing & evaluation (AO3)
- Boundary testing – try the smallest, largest and just‑outside values.
- Equivalence partitioning – group inputs that should behave similarly.
- Debugging – locate and correct logical or syntactic errors.
- Evaluate efficiency (time & memory) and suggest improvements (e.g., using a loop instead of repeated statements).
11. Quick Revision Questions
- State the three stages of the CPU’s operation cycle and give a short description of each.
- Convert the hexadecimal number
3F to binary and decimal.
- Show how the decimal number
-23 is represented in 8‑bit two’s‑complement.
- Explain the difference between a CPU (concept) and a microprocessor (physical device).
- Why does a higher clock speed not always give a proportionally faster program?
- List two advantages of having multiple cores in a microprocessor.
- Identify the three parts of a data packet and the role of each.
- Describe one method of error detection and one method of error correction used in data transmission.
- What is the main advantage of asymmetric encryption over symmetric encryption?
- Give an example of how a sensor and an actuator can be combined in a simple automated system.
- Write pseudocode to calculate the average of three numbers entered by the user.
- Using a trace table, show the values of the variables in the pseudocode from question 11 when the inputs are 4, 7 and 2.
- Explain what a cookie does in a web browser.
- What is a blockchain and why does it make digital currency secure?
- Identify two common cyber‑security threats and one practical counter‑measure for each.