Understand the instruction set

Computer Architecture – The Instruction Set

Purpose of an Instruction Set

The instruction set is the fixed contract between hardware and software. It defines the exact binary commands a CPU can execute directly, allowing high‑level programs to be translated into actions the processor can perform.

1. What Is an Instruction?

An instruction is a binary word that tells the processor to perform a specific operation (arithmetic, data movement, or control flow).

• Opcode – the operation code that identifies the action (e.g., ADD, LOAD).
• Operand(s) – the data or the location of the data on which the operation acts.
• Addressing mode – the way the operand is interpreted (immediate, register, direct, etc.).

2. Instruction Formats

Cambridge IGCSE expects you to recognise fixed‑length formats. The two most common lengths are 8‑bit (illustrative) and 32‑bit (typical for many RISC processors).

Worked Example – Encoding a 32‑bit ADD Instruction

Assembly: ADD R9, R2, #20

1. Opcode for ADD = 000100 (6 bits).
2. Destination register R9 = 01001 (5 bits).
3. Source register R2 = 00010 (5 bits).
4. Immediate value 20 = 0000000000010100 (16 bits).

000100 01001 00010 0000000000010100

Reading left‑to‑right gives the binary instruction that the CPU will fetch.

3. Types of Instructions

Four broad categories are required for the syllabus. Each is illustrated with a typical assembly mnemonic.

1. Data‑transfer – moves data between registers, memory, or I/O.
   Example: LOAD R1, 1000 ; R1 ← M[1000]
2. Arithmetic‑logic – performs calculations or logical operations.
   Example: ADD R3, R1, R2 ; R3 ← R1 + R2
3. Control‑flow – changes the sequence of execution.
   Example: BEQ R4, R5, 200 ; if R4 = R5 branch to PC+200
4. Special‑purpose – manipulates status flags, handles interrupts, etc.
   Example: SETFLAG Z ; set the Zero flag

4. Addressing Modes

Addressing modes define how the operand of an instruction is obtained. The table below shows the common modes required for the IGCSE, each with notation, a short explanation and a numeric example.

5. RISC vs CISC

Two contrasting philosophies for designing instruction sets. Knowing the differences helps you answer exam questions that ask you to compare them.

• RISC (Reduced Instruction Set Computer)
  • Small number of simple, fixed‑length instructions (usually 32‑bit).
  • Each instruction typically executes in one clock cycle.
  • Load/store architecture – arithmetic operates only on registers.
  • Example: to copy a block of memory you need a loop of LOAD + STORE instructions.
• CISC (Complex Instruction Set Computer)
  • Large number of varied‑length instructions (1–15 bytes).
  • Some instructions perform multi‑step operations (e.g., REP MOVS copies a string).
  • Fewer instructions are needed to write a program, but execution time per instruction varies.
  • Example: a single STRING COPY instruction can replace an entire loop.

6. The Fetch‑Decode‑Execute Cycle

Every instruction passes through three stages:

1. Fetch – the CPU reads the next instruction from memory using the Program Counter (PC).
2. Decode – the instruction register isolates the opcode and determines which circuit (ALU, memory unit, etc.) will be used.
3. Execute – the required operation is performed; the result is written back to a register or memory, and the PC is updated.

Diagram suggestion (for teachers): a block diagram showing the PC → Memory → Instruction Register → Decoder → Control Unit → ALU/Registers → Write‑back, with arrows indicating the flow of opcode, operands, and addressing‑mode signals.

7. Sample Instruction Set (Simplified)

8. Example Program – Adding Two Numbers

This short program adds the contents of memory locations 1000 and 1004 and stores the result at 1008.

    LOAD   R1, 1000      ; R1 ← M[1000]
    LOAD   R2, 1004      ; R2 ← M[1004]
    ADD    R3, R1, R2    ; R3 ← R1 + R2
    STORE  R3, 1008      ; M[1008] ← R3

9. Checklist – Have All Required Sub‑topics Been Covered?

• ☑ Purpose of an instruction set
• ☑ Definition of an instruction (opcode, operands, addressing mode)
• ☑ Fixed‑length instruction formats (8‑bit & 32‑bit examples)
• ☑ Binary encoding of an instruction (worked example)
• ☑ Four main types of instructions (data‑transfer, arithmetic‑logic, control‑flow, special‑purpose)
• ☑ All five addressing modes required by the syllabus with numeric examples
• ☑ RISC vs CISC comparison (key characteristics & example)
• ☑ Fetch‑decode‑execute cycle description
• ☑ Sample instruction set table
• ☑ Complete example program

10. Key Points to Remember

• Every instruction consists of an opcode and one or more operands.
• Addressing modes determine how the CPU locates the operand (immediate, register, direct, indirect, indexed).
• RISC favours many simple, fixed‑length instructions that each execute in one cycle; CISC provides fewer, more complex instructions that can do more work per instruction.
• Understanding binary encoding helps with low‑level debugging and with exam questions that ask you to translate between assembly and machine code.
• All instructions pass through the fetch‑decode‑execute cycle – a core concept for both hardware and software questions.