Identify and use standard logic gate symbols: AND, OR, NOT, NAND, NOR, XOR

Boolean Logic – Cambridge IGCSE Computer Science (Topic 10)

Learning objective

Identify and use the six standard logic‑gate symbols (AND, OR, NOT, NAND, NOR, XOR), construct and analyse simple logic circuits (maximum 3 inputs, 1 output), and translate accurately between:

  • English statements
  • Boolean expressions
  • Truth tables
  • Circuit diagrams

1. Official logic‑gate symbols (exam style)

For the IGCSE exam you must draw the exact schematic symbols shown in the Cambridge syllabus (Fig. 4). Do not use programming symbols such as “&”, “|” or “!” – doing so can lose marks.

Gate Schematic symbol (official) Algebraic symbol Boolean expression Common name
AND AND gate symbol ∧ (or ·) A ∧ B Conjunction
OR OR gate symbol ∨ (or +) A ∨ B Disjunction
NOT NOT gate symbol ¬ (over‑line) ¬A (or Ā) Negation
NAND NAND gate symbol ¬(A ∧ B) Negated AND
NOR NOR gate symbol ¬(A ∨ B) Negated OR
XOR XOR gate symbol A ⊕ B Exclusive OR

2. Truth tables for the basic gates

AND (A ∧ B)

ABA ∧ B
000
010
100
111

OR (A ∨ B)

ABA ∨ B
000
011
101
111

NOT (¬A)

A¬A
01
10

NAND (¬(A ∧ B))

AB¬(A ∧ B)
001
011
101
110

NOR (¬(A ∨ B))

AB¬(A ∨ B)
001
010
100
110

XOR (A ⊕ B)

ABA ⊕ B
000
011
101
110

3. Limits on circuit size (Cambridge requirement)

  • Maximum three inputs and one output per circuit.
  • All gates must be drawn with the official schematic symbols (see Section 1).
  • Exceeding the limit results in a loss of marks – the exam board deducts 1 mark for each extra input or output.

4. Translating between statements, expressions, truth tables & circuits

4.1 English → Boolean expression

  1. Identify the logical operators in the sentence.
  2. Replace “and” with , “or” with , “not” with ¬.
  3. Use parentheses to show the required order of evaluation (NOT has highest precedence, then AND, then OR; XOR is evaluated after AND but before OR).

Example (two inputs): “The alarm sounds if the door is open and the window is closed, or if the motion sensor is triggered.”

Expression: (Door ∧ ¬Window) ∨ Motion

Example (three inputs – matching the circuit limit): “A warning light turns on when the temperature is high or the pressure is high, but not when the safety switch is off.”

Expression: (Temp ∨ Pressure) ∧ ¬Switch

4.2 Boolean expression → circuit diagram

  1. Break the expression into sub‑expressions that correspond to individual gates.
  2. Draw each gate using the official schematic symbol.
  3. Connect the inputs to the appropriate gate inputs; the output of the final gate is the circuit output.

Worked example: Implement F = (A ∧ B) ∨ ¬C (three inputs, one output).

Circuit for F = (A ∧ B) ∨ ¬C
AND gate for A ∧ B, NOT gate for ¬C, both feeding an OR gate.

4.3 Circuit → Boolean expression & truth table (full worked‑out example)

Consider the circuit below: an OR gate takes inputs A and B; its output feeds a NOT gate; the NOT output and a third input C are combined in an AND gate.

Circuit: (A ∨ B) → NOT → AND with C
Step‑by‑step reading from left to right.

Step 1 – Write the expression for each gate

  • OR: A ∨ B
  • NOT: ¬(A ∨ B)
  • AND (final output): ¬(A ∨ B) ∧ C

Step 2 – Combine into a single expression

F = ¬(A ∨ B) ∧ C

Step 3 – Complete the truth table (all 8 combinations of A, B, C)

ABCA ∨ B¬(A ∨ B)F = ¬(A ∨ B) ∧ C
000010
001011
010100
011100
100100
101100
110100
111100

5. Example three‑input circuits

5.1 Example A – XOR followed by AND

Expression: G = (A ⊕ B) ∧ C

Circuit for G = (A ⊕ B) ∧ C
XOR gate for A ⊕ B, AND gate combines the XOR output with C.

5.2 Example B – NOR feeding an AND

Expression: H = (¬(A ∨ B)) ∧ C (identical Boolean form to the circuit in 4.3, shown here with a different gate combination).

Circuit for H = ¬(A ∨ B) ∧ C
NOR gate for A ∨ B (output already negated), then AND with C.

Truth table for both Example A and Example B (they are logically equivalent)

ABCA⊕BG = (A⊕B)∧C
00000
00100
01010
01111
10010
10111
11000
11100

6. Practice questions (exam‑style)

  1. Expression from gates – Write the Boolean expression for a NAND gate using only AND and NOT operators.
    Answer: ¬(A ∧ B)
  2. Complete a truth table – Fill in the missing columns for the expression G = (A ⊕ B) ∧ C. (Use the table in Section 5.1 as a guide.)
  3. Identify the gate – Which gate produces the output shown?
    ABOutput
    001
    010
    100
    110

    Answer: NAND gate.
  4. From circuit to expression & truth table – The circuit below has three inputs (A, B, C). An OR gate takes A and B; its output feeds a NOT gate; the NOT output and C are combined in an AND gate. Write the Boolean expression and the complete truth table.
    Answer: Expression F = ¬(A ∨ B) ∧ C; truth table as shown in Section 4.3.
  5. AO3 – design justification (compare two implementations) – Explain why the expression F = (A ∧ B) ∨ ¬C is best implemented with an AND, a NOT and an OR gate rather than using a single NAND‑only implementation. In your answer discuss:
    • Number of gates required.
    • Clarity of the diagram for the examiner.
    • Whether the NAND‑only version would exceed the three‑input limit (it would need extra inverters).
    Suggested points: Mixed‑gate solution uses 3 gates; NAND‑only needs at least 4 gates (two NANDs to make the NOT, one NAND for the AND, and a final NAND to produce the OR), increasing the chance of exceeding the size limit and of losing marks for unnecessary complexity.

7. Summary checklist (what you must remember for the exam)

  • Draw only the official schematic symbols for AND, OR, NOT, NAND, NOR and XOR.
  • Never use programming symbols such as “&”, “|”, “!” or “^”.
  • Keep every circuit to ≤ 3 inputs and exactly 1 output – exceeding this loses marks.
  • Be able to translate:
    • English → Boolean expression (use ∧, ∨, ¬, ⊕ and parentheses).
    • Boolean expression → circuit (identify required gates, draw them, connect correctly).
    • Circuit → Boolean expression → truth table (read left‑to‑right, write sub‑expressions, evaluate all input combinations).
  • Memorise the truth tables for each basic gate – they are the foundation for all combined‑circuit tables.
  • When asked to justify a design (AO3), discuss gate count, diagram clarity, and adherence to the three‑input/one‑output rule.

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