Explain the suitability of each method for a scenario

Cambridge IGCSE 0478 Computer Science – Syllabus Notes

1. Data Representation

1.1 Number Systems

  • Binary (base‑2) – digits 0 and 1. Used internally by all digital devices.
  • Octal (base‑8) – digits 0‑7. Often used as a shorthand for groups of three binary bits.
  • Decimal (base‑10) – digits 0‑9. The system humans use.
  • Hexadecimal (base‑16) – digits 0‑9 and A‑F. Convenient for representing groups of four binary bits.
DecimalBinaryOctalHexadecimal
0000000
13110115D
25511111111377FF
1023111111111117773FF

1.2 Conversions (quick methods)

  • Decimal → Binary: divide by 2, record remainders (bottom‑up).
  • Binary → Hexadecimal: group bits in fours from the right, replace each group with its hex digit.
  • Hexadecimal → Decimal: multiply each digit by 16ⁿ (n = position from right, starting at 0) and add.

1.3 Two’s‑Complement (signed integers)

  1. Write the absolute value in binary.
  2. Invert all bits (1 → 0, 0 → 1).
  3. Add 1 to the inverted result.

Example: Represent –13 in 8‑bit two’s‑complement.

13  → 00001101
invert → 11110010
add 1 → 11110011  (‑13)

1.4 Text Representation

  • ASCII – 7‑bit code, 128 characters (e.g., ‘A’ = 01000001₂ = 41₁₆).
  • Unicode (UTF‑8) – variable‑length, can represent all world scripts; compatible with ASCII for the first 128 characters.

1.5 Images, Sound & Video

  • Image colour depth: bits per pixel (bpp). Example: 24‑bit colour = 8 bits for each of R, G, B → 16 777 216 colours.
  • Resolution: number of pixels horizontally × vertically (e.g., 1920 × 1080).
  • Audio sampling: Sample rate (e.g., 44.1 kHz) × bit depth (e.g., 16‑bit) × channels (mono/stereo). Data rate = rate × depth × channels.
  • Compression:
    • Lossless – no information lost (e.g., PNG, ZIP). Good for text and some images.
    • Lossy – discards less‑noticeable data (e.g., JPEG, MP3). Higher compression but reduced quality.

2. Data Transmission

2.1 Transmission Types

2.1.1 Serial vs Parallel
  • Serial – bits sent one after another on a single channel.
  • Parallel – multiple bits sent simultaneously on separate channels (usually 4, 8, 16 or 32).
AspectSerialParallel
Typical bit‑rate (short‑range)USB 2.0 = 480 Mbit/s, SATA III = 6 Gbit/sPCI‑Express x8 ≈ 8 Gbit/s (8 lanes)
Distance limitationMetres to kilometres (e.g., Ethernet over fibre)Only a few metres (cable bulk, skew)
Signal integrityLow crosstalk, easier shieldingHigher crosstalk, requires matched length & shielding
Cost & complexityFewer conductors, cheaper connectorsMore conductors, larger connectors, higher cost
Typical useUSB, Ethernet, SATA, PCIe, UARTLegacy printer ports, internal CPU‑memory buses
2.1.2 Synchronous vs Asynchronous
  • Synchronous – a shared clock (or embedded clock) coordinates sender and receiver.
  • Asynchronous – each character/byte is framed by start and stop bits; no shared clock.
AspectSynchronousAsynchronous
ClockingDedicated clock line or clock recovered from dataStart/stop‑bit framing only
Throughput efficiencyVery high – little overheadLower – start/stop bits add 20‑30 % overhead
Hardware complexityMore complex (PLL, clock recovery)Simple UART/USART
Typical useEthernet, USB, SPI, I²C, fibre‑optic linksRS‑232 ports, simple micro‑controller links
2.1.3 Duplex Modes
  • Simplex – one‑way only (e.g., TV broadcast).
  • Half‑duplex – two‑way but not simultaneous (e.g., walkie‑talkie, CAN bus).
  • Full‑duplex – simultaneous two‑way transmission (e.g., telephone, Ethernet full‑duplex).

2.2 Packet Structure & Switching

  • A packet consists of a header, payload (user data) and a trailer (error‑check).
  • Typical header fields (simplified for IGCSE):
    • Source address
    • Destination address
    • Length/size
    • Protocol identifier (e.g., TCP, UDP)
    • Checksum / CRC
  • Packet switching – large messages are divided into packets; each packet may travel a different route to the destination, where they are re‑assembled.
  • Contrast with circuit switching – a dedicated path is reserved for the whole session (e.g., traditional telephone networks).

2.3 Transmission Methods & Common Interfaces

Method / InterfaceTransmission typeTypical speedTypical use
USB 1.1Serial, asynchronous, half‑duplex12 Mbit/sKeyboards, mice, flash drives
USB 2.0Serial, asynchronous, full‑duplex480 Mbit/sExternal hard disks, webcams
USB 3.0 (SuperSpeed)Serial, synchronous, full‑duplex5 Gbit/sHigh‑speed storage, video capture
Ethernet (10/100/1000 Mbps)Serial, synchronous, full‑duplex10 Mb/s – 1 Gb/s (10 Gb/s newer)LANs, internet back‑haul
Wi‑Fi (802.11ac)Serial, asynchronous, half‑/full‑duplex (CSMA/CA)Up to 1.3 Gb/sWireless LANs, mobile devices
Bluetooth 4.0 (LE)Serial, asynchronous, half‑duplex1 Mbps (LE), 3 Mbps (Classic)Wearables, IoT sensors
RS‑232Serial, asynchronous, simplex or half‑duplex115.2 kbps (typical)Legacy equipment, industrial control
SPI (Serial Peripheral Interface)Serial, synchronous, full‑duplexUp to 50 Mbps (depends on MCU)Microcontroller‑to‑peripheral links

2.4 USB Packet Example (simplified)

| PID | ADDR | ENDP | CRC5 | DATA... | CRC16 |
|-----|------|------|------|---------|-------|
  8b   7b     4b    5b    n bytes   16b

PID = Packet Identifier (e.g., Token, Data, Handshake). The CRC fields provide error detection.

2.5 Error‑Detection, Correction & Encryption

2.5.1 Error‑Detection Methods
  • Parity bit – adds one bit to make the total number of 1’s even (even parity) or odd (odd parity). Detects single‑bit errors.
  • Checksum – adds the binary sum of data bytes (often 1’s‑complement). Used in TCP, UDP, IP.
  • Cyclic Redundancy Check (CRC) – polynomial division generates a remainder (the CRC). Detects burst errors; common in Ethernet and storage.
  • Automatic Repeat Request (ARQ) – combines detection with retransmission.
    • Stop‑and‑Wait
    • Go‑Back‑N
    • Selective Repeat
    Forms the basis of TCP reliability.
  • Check digit – decimal digit calculated from other digits (e.g., ISBN, credit‑card numbers) to catch transcription errors.
2.5.2 Encryption (Data Confidentiality)
  • Symmetric encryption – same key for encryption and decryption (e.g., AES, DES). Fast; suitable for bulk data.
  • Asymmetric encryption – public‑key/private‑key pair (e.g., RSA, ECC). Solves key‑distribution problem; used for secure key exchange and digital signatures.
  • Key points for IGCSE:
    • Encryption scrambles data so only the correct key can read it.
    • Symmetric is faster but requires a secure way to share the key.
    • Asymmetric is slower but allows secure key exchange without a prior secret.

3. Computer Hardware (IGCSE Syllabus Block 3)

3.1 CPU Architecture & the Fetch‑Decode‑Execute Cycle

  1. Fetch – the CPU reads the next instruction from memory (address held in the Program Counter).
  2. Decode – the instruction register (IR) sends the opcode to the control unit, which determines what operation is required.
  3. Execute – the arithmetic‑logic unit (ALU) performs the operation; results may be stored in registers or written back to memory.

Typical registers involved: Program Counter (PC), Instruction Register (IR), Accumulator (ACC), General‑purpose registers (R0‑R7).

3.2 Core, Cache & Buses

  • Core – an independent processing unit; modern CPUs have multiple cores for parallel execution.
  • Cache – small, fast memory close to the CPU (L1, L2, L3). Stores frequently accessed data to reduce main‑memory accesses.
  • System bus – carries data, addresses and control signals between CPU, memory and I/O devices.

3.3 Instruction Set & Machine Language

  • Each CPU has a defined instruction set (e.g., ADD, SUB, LOAD, STORE, JUMP).
  • Instructions are encoded as binary machine code. Assemblers translate symbolic assembly language into machine code.

3.4 Embedded Systems

  • Specialised computers designed for a specific function (e.g., microwave controller, digital watch).
  • Often use microcontrollers with integrated CPU, memory, I/O ports and sometimes built‑in communication interfaces (UART, SPI, I²C).

4. Software (IGCSE Syllabus Block 4)

4.1 System Software vs Application Software

  • System software – manages hardware resources and provides a platform for other software (e.g., Operating System, device drivers).
  • Application software – performs user‑oriented tasks (e.g., word processor, web browser, games).

4.2 Operating System Functions

  • Resource management (CPU scheduling, memory allocation).
  • File management (creation, deletion, organisation).
  • Device control (through drivers).
  • Security & user accounts.
  • Providing a user interface (CLI or GUI).

4.3 Interrupts

  • Hardware interrupt – generated by an external device (e.g., keyboard press) to gain immediate CPU attention.
  • Software interrupt – generated by a program (e.g., system call) to request OS services.
  • Interrupt handling allows multitasking and responsive I/O.

4.4 Levels of Programming Language

LevelTypical UseCharacteristics
Machine languageDirect CPU controlBinary, processor‑specific
Assembly languageLow‑level optimisationMnemonic symbols, one‑to‑one with machine code
High‑level languageGeneral purpose programmingEnglish‑like syntax, portable, compiled or interpreted

4.5 Compilers vs Interpreters

  • Compiler – translates the whole source program into machine code before execution (e.g., C, Java – compiled to bytecode).
  • Interpreter – reads and executes source statements one at a time (e.g., Python, BASIC).
  • Compiled programs run faster; interpreted programs are easier to test and modify.

4.6 Integrated Development Environments (IDEs)

  • Combine a code editor, compiler/interpreter, debugger and often a visual designer.
  • Examples: Eclipse, Visual Studio, PyCharm.

5. Network Hardware & Addressing

5.1 Core Devices

HardwareFunctionKey Identifier
Network Interface Card (NIC)Provides physical and data‑link connectivityMAC address (48‑bit)
RouterForwards packets between different networks; performs IP routingIP address (IPv4/IPv6)
SwitchConnects multiple devices in a LAN; forwards frames based on MAC addressMAC address table
ModemModulates/demodulates signals for transmission over telephone lines or cablePublic IP address (usually assigned by ISP)
Access Point (AP)Provides wireless connectivity to a wired LANMAC address; SSID (network name)

5.2 IP Addressing (IPv4)

  • Four octets (e.g., 192.168.1.10). Each octet is 0‑255.
  • Subnet mask – separates network and host portions (e.g., 255.255.255.0).
  • From the mask you can determine:
    • Network address (AND operation between IP and mask).
    • Broadcast address (host bits set to 1).
    • Number of usable host addresses = 2ⁿ − 2 (n = host bits).

6. Internet & Web Basics (IGCSE Syllabus Block 5)

6.1 Internet vs World Wide Web

  • Internet – global network of interconnected computers and devices; provides services such as email, file transfer, remote login.
  • World Wide Web (WWW) – a service that runs on the Internet; uses HTTP/HTTPS to retrieve and display hyper‑text documents (web pages).

6.2 URL (Uniform Resource Locator) Breakdown

https://www.example.com:443/path/page.html?search=term#section2
│   │   │            │   │    │            │            │
│   │   │            │   │    │            │            └─ Fragment identifier
│   │   │            │   │    │            └─ Query string
│   │   │            │   │    └─ Path to resource
│   │   │            │   └─ Port number (optional)
│   │   │            └─ Domain name (host)
│   │   └─ Sub‑domain (www)
│   └─ Protocol (https)
└─ Scheme separator (://)

6.3 HTTP & HTTPS

  • HTTP – Hyper‑Text Transfer Protocol; stateless request/response model.
  • HTTPS – HTTP over TLS/SSL; provides encryption, authentication and data integrity.

6.4 DNS (Domain Name System)

  • Translates human‑readable domain names (e.g., www.example.com) into IP addresses.
  • Hierarchical structure: root → top‑level domain (TLD) → second‑level domain → sub‑domains.

6.5 Cookies

  • Small pieces of data stored by a web browser on the client side.
  • Used to maintain state (e.g., login sessions, shopping‑cart contents).
  • Can be session cookies (deleted when the browser closes) or persistent cookies (saved for a set period).

6.6 Digital Currency & Blockchain (basic IGCSE overview)

  • Digital currency – electronic money that exists only in digital form (e.g., Bitcoin).
  • Blockchain – a distributed ledger where each block contains a list of transactions and a hash of the previous block, providing tamper‑evidence.
  • Key ideas for the exam:
    • Decentralised verification (no single authority).
    • Use of cryptographic hash functions to link blocks.

7. Cyber‑Security Threats & Counter‑Measures (IGCSE 5.3)

ThreatWhat it doesTypical Counter‑measure
Malware (virus, worm, Trojan)Unauthorised code execution, data loss or theftAntivirus software, regular updates, safe‑download practices
PhishingDeceptive messages to obtain passwords or personal dataUser education, email filtering, two‑factor authentication
Denial‑of‑Service (DoS) / DDoSOverloads a service, making it unavailableFirewalls, rate limiting, traffic‑scrubbing services
Man‑in‑the‑Middle (MitM)Intercepts and possibly alters communicationHTTPS/TLS, VPNs, certificate verification
Unauthorised accessIntruder gains control of a systemStrong passwords, account lockout, role‑based access control

8. Emerging & Automated Technologies (IGCSE 6.1‑6.3)

  • Sensors – convert physical phenomena (temperature, light, motion) into electrical signals. Common interfaces: I²C, SPI, UART.
  • Actuators – convert electrical signals into motion or force (motors, servos, solenoids).
  • Robotics – integration of sensors, actuators and control algorithms to perform tasks autonomously.
  • Artificial Intelligence (AI) basics – rule‑based systems and simple machine‑learning concepts (e.g., decision trees) used in smart devices.
  • Internet of Things (IoT) – network of sensors/actuators communicating via low‑power wireless methods (BLE, LoRaWAN) and often using cloud services for data storage and analysis.

9. Scenario Matching – Choosing the Most Suitable Transmission Method

  1. Transferring a large file between two servers in the same building.
    • Suitable method: Gigabit Ethernet (or 10 GbE) over Cat‑6 cable.
    • Reasoning: Serial, synchronous, full‑duplex transmission gives high throughput, low latency and reliable error‑checking (CRC). Parallel cabling is unnecessary for short distances, and wireless would add interference and lower speed.
  2. Connecting a microcontroller to a temperature sensor on a PCB.
    • Suitable method: SPI (Serial Peripheral Interface).
    • Reasoning: Synchronous, full‑duplex, few pins, high data‑rate for short distances, and deterministic timing – ideal for on‑board sensor communication.
  3. Providing internet access to mobile laptops across a university campus.
    • Suitable method: Wi‑Fi (802.11ac or newer) using multiple access points.
    • Reasoning: Wireless, supports many simultaneous users, sufficient bandwidth for typical office tasks, and can cover large areas with strategically placed APs.
  4. Sending a short command from a wearable fitness tracker to a smartphone.
    • Suitable method: Bluetooth Low Energy (BLE).
    • Reasoning: Asynchronous, half‑duplex, very low power consumption, range up to 100 m, and adequate data‑rate for small packets.
  5. Streaming high‑definition video from a home media server to a TV over a 10‑metre link.
    • Suitable method: HDMI (parallel, synchronous, full‑duplex) or HDMI‑over‑Ethernet (HDBaseT) if longer runs are needed.
    • Reasoning: Parallel transmission provides very high bandwidth (up to 48 Gbps for HDMI 2.1) with minimal latency, essential for HD video. For distances beyond 5 m, HDBaseT uses Cat‑6 cable while preserving video quality.
  6. Remote monitoring of a weather station in a rural area with no wired infrastructure.
    • Suitable method: Satellite communication (e.g., LEO broadband) or cellular (LTE) if coverage exists.
    • Reasoning: Wireless, long‑range, can transmit small sensor packets. Satellite offers global coverage; LTE provides lower latency where a cell tower is reachable.
  7. Real‑time control of industrial machinery on a factory floor.
    • Suitable method: Ethernet/IP or PROFINET over shielded twisted‑pair (STP) with full‑duplex, synchronous transmission.
    • Reasoning: High reliability, deterministic timing, built‑in error detection (CRC), and immunity to EMI provided by shielding.

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