Draw logic circuits based on problem statements, logic expressions or truth tables

Boolean Logic – Cambridge IGCSE 0478 (Section 10)

This section equips you with the skills required to identify, analyse and construct logic circuits that contain ≤ 3 inputs and a single output – exactly the format used in the exam. It also shows how this topic fits into the wider IGCSE 0478 syllabus.

---

1. How Boolean Logic Fits into the Whole Syllabus

Syllabus Unit	Key Content	What to Check in Your Notes
1 Data Representation	Binary, denary, hexadecimal, two’s‑complement, logical shifts	Conversion tables (dec ↔ bin ↔ hex), 8‑bit two’s‑complement examples, left/right shift problems.
1.2 Text, Sound & Images	ASCII/Unicode, sample‑rate, resolution, colour‑depth, pixel count	Side‑box comparing ASCII (7 bits) vs Unicode (UTF‑8); quick file‑size calculation.
1.3 Data Storage & Compression	Units (bit → EiB), lossless vs lossy compression (RLE, JPEG, MP3)	Worksheet: size of a 1920×1080, 24‑bit image before/after RLE.
2 Data Transmission	Packet structure, parity, checksum, ARQ, symmetric & asymmetric encryption	Diagram of a packet with header/payload/trailer; parity‑calculation exercise.
3 Hardware	CPU, Von Neumann, FDE cycle, registers (PC, MAR, MDR, CIR, ACC), cores, cache, instruction set, embedded systems	Fetch‑decode‑execute flowchart; table contrasting single‑core vs multi‑core performance.
3.2 I/O Devices & Sensors	List of input/output devices; sensor types (temperature, pressure, etc.)	Matching table: sensor → data type → example use‑case.
3.3 Data Storage	Primary vs secondary storage, magnetic/optical/SSD, virtual memory, cloud storage	Case‑study: moving a 2 GB video from HDD to cloud (bandwidth, latency).
3.4 Network Hardware	NIC, MAC address format, IPv4/IPv6, router functions	Sample MAC breakdown; IPv4‑to‑IPv6 conversion note.

Exam tip: The Cambridge paper expects you to be able to answer questions from any of the units above. Keep this checklist handy and tick each item as you confirm it is covered in your revision notes.

---

2. Standard Logic‑gate Symbols and Functions

Gate Symbol	Gate name	Boolean expression	Typical inputs	Key use
	AND	A·B (or A∧B)	2 or more	Conjunction – output 1 only when **all** inputs are 1.
	OR	A+B (or A∨B)	2 or more	Disjunction – output 1 when **any** input is 1.
	NOT	¬A (or \(\overline{A}\))	1	Inverter – flips 0 ↔ 1.
	NAND	¬(A·B)	2 or more	Universal gate – can build any other gate.
	NOR	¬(A+B)	2 or more	Also universal.
	XOR	A⊕B	2	Output 1 when an odd number of inputs are 1.

Exam tip: In the Cambridge paper the gate symbols appear exactly as shown above. Memorise both the picture and the corresponding Boolean notation.

---

3. Truth Tables

A truth table lists the output for every possible combination of inputs. For two‑input gates the standard tables are:

A	B	AND (A·B)	OR (A+B)	NOT A (¬A)	XOR (A⊕B)
0	0	0	0	1	0
0	1	0	1	1	1
1	0	0	1	0	1
1	1	1	1	0	0

For three‑input circuits you need an eight‑row table (2³ combinations). Always label the columns clearly (e.g. A, B, C, F).

---

4. Translating Between Problem Statements, Boolean Expressions, Truth Tables and Logic Circuits

The syllabus expects you to master three separate directions. The following matrix links each direction to a worked example.

Task (as written in the syllabus)	What you must do	Worked example
Problem statement → circuit	Read a plain‑English description, write the Boolean expression, then draw the circuit.	Statement: “The alarm sounds if motion is detected and it is night.” Expression: M·N Circuit: two inputs (M, N) into a two‑input AND gate; the gate’s output is the alarm signal.
Expression → circuit	Apply the operator‑precedence rules (NOT > AND > OR > XOR) and replace each operator with its gate symbol.	Expression: F = ( A·B ) + ¬C Parentheses → AND gate for A and B. ¬C → NOT gate on C. + → OR gate joining the AND output and the NOT‑C output. Resulting circuit: (see diagram below)
Truth table → circuit	Use the sum‑of‑products (SOP) method, then optionally simplify with a Karnaugh map (useful for higher marks).	Given truth table (excerpt): A B C F 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1 1 SOP construction (rows where F = 1 are called *minterms*): Row 2 → \(\overline{A}\,\overline{B}\,C\) Row 3 → \(\overline{A}\,B\,\overline{C}\) Row 5 → \(A\,\overline{B}\,\overline{C}\) Row 8 → \(A\,B\,C\) SOP expression: \(F = (\overline{A}\,\overline{B}\,C) + (\overline{A}\,B\,\overline{C}) + (A\,\overline{B}\,\overline{C}) + (A\,B\,C)\). Circuit: four three‑input AND gates feeding a four‑input OR gate; NOT gates provide the required complements.

Operator‑precedence reminder (exam favourite)

1. NOT (¬)
2. AND (·)
3. OR (+)
4. XOR (⊕) – evaluated after OR if both appear.

---

5. Simplifying SOP Expressions – Karnaugh Maps (Optional, up to 2 extra marks)

After writing the raw SOP expression you can often reduce the number of gates by grouping adjacent 1’s on a 3‑variable K‑map.

AB\C	0	1
00	0	1
01	1	0
11	0	1
10	1	0

• Identify groups of 1, 2, 4 or 8 cells.
• Write the simplified product term for each group (ignore variables that change within the group).
• Combine the product terms with OR.

Example simplification: The map above reduces to \(F = \overline{A}C + B\overline{C}\). The resulting circuit uses only two AND gates and one OR gate.

---

6. Reverse‑direction Activities (required by the syllabus)

6.1 From Circuit → Boolean expression

Task: Write the expression for the circuit shown below (use the official symbols).

Answer (teacher): \(F = A·\overline{B} + C\).

6.2 From Circuit → Truth table

Task: Complete the truth table for the circuit shown in the previous figure.

A	B	C	F
0	0	0	0
0	0	1	1
0	1	0	0
0	1	1	1
1	0	0	1
1	0	1	1
1	1	0	0
1	1	1	1

---

7. Quick‑Reference Checklist for Exam Day

• Gate symbols: memorise the exact shapes shown in Section 2.
• Operator precedence: NOT → AND → OR → XOR.
• From statement to circuit: write the Boolean expression first, then replace each operator with its gate.
• From truth table to circuit: build the SOP expression (minterms), then draw the AND‑OR network; simplify with a K‑map if you have time.
• From circuit to expression/table: trace each path, apply De Morgan’s laws where needed, and fill the table systematically.
• Mark‑scheme tricks: show at least one intermediate step (e.g., the SOP form) to earn full marks even if you don’t fully simplify.
• Syllabus coverage: verify that you have notes for every unit in the checklist at the start of this document.

Use this sheet as a one‑page revision aid; practice each direction multiple times with past‑paper questions to build confidence.