Lesson Plan

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Lesson Plan
Grade: Date: 17/01/2026
Subject: Computer Science
Lesson Topic: Understand and define the functions of: NOT, AND, OR, NAND, NOR and XOR (EOR) gates
Learning Objective/s:
  • Describe the Boolean function of each basic logic gate (NOT, AND, OR, NAND, NOR, XOR).
  • Construct and interpret truth tables for each gate.
  • Identify and draw the standard symbols for each gate in circuit diagrams.
  • Apply gates to design simple Sum‑of‑Products and Product‑of‑Sums circuits.
  • Evaluate circuit behavior using truth tables and explain functional completeness of NAND and NOR.
Materials Needed:
  • Projector or interactive whiteboard
  • Slides with gate symbols and truth tables
  • Printed worksheets with truth‑table exercises
  • Set of physical logic gate cards or simulation software (e.g., Logisim)
  • Whiteboard and markers
  • Exit‑ticket slips
 Introduction:
Begin with a quick poll: “Which everyday devices rely on logic gates?” Connect this to students’ prior knowledge of binary decisions and state the success criteria: students will be able to define each gate’s function, read its symbol, and create a truth table.
Lesson Structure:
  1. Do‑now (5’) – Matching activity linking gate names to everyday examples.
  2. Direct instruction (10’) – Teacher presents gate definitions, symbols, and truth tables using slides.
  3. Guided practice (12’) – Whole‑class construction of truth tables for each gate on the whiteboard.
  4. Collaborative activity (15’) – Small groups use logic‑gate cards or Logisim to build a simple SOP circuit and verify its output.
  5. Check for understanding (8’) – Quick clicker quiz where students identify the correct gate symbol for a given truth table.
  6. Summary discussion (5’) – Review key points and address misconceptions.
Conclusion:
Recap the functions and symbols of all six gates, emphasizing how NAND and NOR can replace any other gate. Students complete an exit ticket by writing one real‑world example for a chosen gate. For homework, assign a worksheet to design a two‑input circuit using only NAND gates.