Lesson Plan

• Describe each stage of the fetch‑execute cycle and the micro‑operations performed.
• Identify the purpose of the main registers (PC, IR, MAR, MDR, ACC, SR) within the cycle.
• Explain how control signals coordinate data movement between registers and memory.
• Compare the sequential cycle with pipelined execution.
• Apply the cycle to trace a simple instruction through fetch, decode, execute, and write‑back.

• Projector or interactive whiteboard with CPU diagram.
• Slide deck showing the F‑E cycle stages and timing diagram.
• Handout/worksheet with a sample instruction‑trace table.
• Computer with an assembler/IDE for a simple assembly demo.
• Whiteboard and markers.
• Sticky notes or cards for a register‑role activity.

Begin with a quick “What does a CPU need to do to run a program?” hook, then recall that registers such as the PC and IR store instruction information. Explain that today’s success criteria are to name the four stages of the fetch‑execute cycle and match each stage to its key register.

1. Do‑Now (5') – Students write on sticky notes one CPU register they think is most important and why.
2. Mini‑lecture (10') – Present the overall F‑E cycle with a diagram; highlight the flow of control signals.
3. Guided Demo (12') – Walk through the Fetch stage on the projector, showing PC → MAR → MDR → IR and incrementing the PC.
4. Decode & Execute Activity (15') – In pairs, students trace a provided assembly instruction through Decode and Execute, filling out the worksheet and noting ALU operations and flag updates.
5. Store/Write‑back Discussion (8') – Demonstrate how results are written back to registers or memory and how branch instructions modify the PC.
6. Check for Understanding (5') – Exit ticket: list the four stages in order and name one register associated with each.

Recap the four stages and the role of each key register, emphasizing how they enable sequential program execution. Collect exit tickets to gauge understanding, and assign a homework task to diagram the cycle for a new instruction and predict the PC value after execution.